Avispado is a 64-bit in-order RISC-V core designed by Semidynamics, focused on offering efficiency for AI edge applications and embedded systems. Its in-order execution model ensures optimal power consumption, making it a prudent choice for energy-constrained environments such as IoT and mobile devices.
Equipped with Gazzillion Misses™ technology, Avispado effectively manages memory requests for efficient data handling, crucial for processing real-time data streams in embedded setups. This core supports the RISC-V Vector Specification 1.0, making it an excellent fit for machine learning tasks that require vector processing capabilities.
Avispado also features customizable components like branch predictors and configurable instruction/data caches, which can be tailored to fit specific application needs. Its multiprocessor ready design is scalable for systems demanding cache coherence and reliable data access, supporting a wide range of AI and computation-heavy applications.
