The Link Acceleration Unit (LAU) by Panmnesia is a hardware block designed to enhance end-to-end communication over CXL, significantly reducing time-to-market for diverse hardware designs. With device-specific optimizations, the LAU ensures minimal communication latency and deterministic responsiveness, crucial for latency-critical applications.
The IP supports hardware-managed cache coherency, eliminating the need for software intervention by automating processes like back invalidation for varying device types. This results in exceptional latency and power efficiency, maximizing performance-per-watt for designs where power savings are critical.
Compatible with CXL 3.x and backward compatible with CXL 1.1 and 2.0, the LAU offers comprehensive support for subprotocols such as CXL.io, CXL.mem, and CXL.cache, including P2P communication and dynamic capacity device support. It serves a wide range of CXL device types, making it a versatile solution for AI infrastructure.