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All IPs > Interface Controller & PHY > D2D > NuLink Die-to-Die PHY for Standard Packaging

NuLink Die-to-Die PHY for Standard Packaging

From Eliyan

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Description

Eliyan's NuLink Die-to-Die (D2D) PHY products are designed to provide high-performance, low-power connectivity between chips, or 'chiplets,' in a system. Using standard organic laminate packaging, these IP cores maintain power and performance levels that would traditionally require advanced packaging techniques like silicon interposers. This eliminates the need for such technology, allowing cost-effective system design and reducing thermal, test, and production challenges while maintaining performance. Eliyan’s approach enables flexibility, allowing a broad substrate area that supports more chiplets in the package, significantly boosting performance and power metrics. These D2D PHY cores accommodate various industry standards, including UCIe and BoW, providing configurations tailor-made for optimal bump map layout, thus enhancing overall system efficiency.

Features
  • High bandwidth
  • Standard organic packages
  • Support for UCIe and BoW standards
Foundries & Process Nodes
Foundry Process Nodes
Intel Foundry 7nm
TSMC 7nm
Tech Specs
Applications
  • SiP applications
  • Chiplet network designs
  • High-performance ASICs
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