The pPLL05 family targets low-power, low-voltage digital applications. These all-digital PLLs offer a combination of low jitter and compact size, making them suitable for IoT and embedded systems operating below nominal core voltages at frequencies up to 1 GHz. Ideal for clocking in moderate-speed microprocessor blocks, the pPLL05 brings a solid performance-to-power ratio.\n\nAmong its standout features are its compact design under 0.01 sq mm, RMS jitter less than 10ps, and power consumption that is kept below 1.0mW. This power efficiency does not compromise on its capabilities, supporting fractional multiplication, and fitting seamlessly into multi-PLL system arrangements.\n\nTechnologically versatile, the pPLL05 is offered in various nodes such as Samsung's 14LPP and TSMC's N6/N7, which emphasizes its adaptability for a wide range of system requirements, thus allowing businesses to leverage this PLL for custom, low-power device solutions.
