All IPs > Interface Controller & PHY > I2C
The I2C Interface Controller & PHY category in our semiconductor IP catalog presents a crucial array of technologies tailored for seamless communication within embedded systems and a variety of electronic devices. The I2C, or Inter-Integrated Circuit, standard is a well-established protocol that facilitates serial communication, primarily in microcontrollers and other integrated circuits. Within this category, developers will find both controller IPs and Physical Layer (PHY) IPs designed to optimize the efficiency and functionality of I2C communications.
The products in this category include comprehensive controller IP cores that manage the I2C protocol, enabling devices to communicate over a shared bus efficiently. These controllers are essential components for systems requiring robust data exchange, such as sensor networks, home automation systems, and industrial control environments. Leveraging these IP cores can lead to significant reductions in design time, providing developers with a ready-to-use solution that adheres to standard I2C specifications while offering flexibility for customization.
PHY semiconductor IPs are crucial for ensuring the physical transmission of I2C data complies with electronic standards needed in various environments. They handle critical functions such as signal transmission, clock generation, and power management, thereby ensuring that data integrity is maintained across different system components and operating conditions. These IPs are particularly vital for applications that demand high reliability and performance in their I2C communications, such as automotive electronics, consumer devices, and medical equipment.
Integrating I2C Interface Controller & PHY semiconductor IPs can considerably enhance the performance of multi-device systems, offering scalable solutions that adapt to the increasing complexity of modern electronic configurations. By focusing on high efficiency and compatibility, these IPs support the development of innovative products that require reliable and efficient communication protocols, paving the way for advancements in technology and connectivity across industries.
The AHB-Lite APB4 Bridge serves as a crucial interconnect that facilitates communication between the AMBA 3 AHB-Lite and AMBA APB bus protocols. As a parameterized soft IP, it offers flexibility and adaptability in managing system interconnections, bridging the gap between high-speed and low-speed peripherals with efficiency. The bridge's architecture is designed to maintain data integrity while transferring information across different protocol tiers. This bridge supports the implementation of a seamless transition for data exchanges, ensuring data packets are transmitted with minimal latency. It is ideal for systems that require stable connectivity across multiple peripheral interfaces, delivering a cohesive platform for system designers to enhance operational uniformity. By enabling efficient bus conversion, it supports broader system architectures, contributing to the overall efficiency of embedded designs. With its open-architecture design, the AHB-Lite APB4 Bridge caters to a wide range of applications, providing necessary adaptability to meet the unique demands of each project. Its robust design ensures that it can accommodate the complex architectures of modern embedded systems, enhancing both performance and reliability.
The ARINC 818 Product Suite by Great River Technology provides a comprehensive solution for high-performance digital video transmission in avionics applications. It supports the implementation, qualification, testing, and simulation of ARINC 818 products. This suite allows developers to access essential ARINC 818 tools and resources. It ensures optimal performance and reliability in mission-critical equipment by offering both hardware and software components tailored for the ARINC 818 standard. With its focus on high-speed data transfer and signal integrity, the ARINC 818 Product Suite is ideal for applications requiring lossless video transmission and real-time data handling in challenging conditions.
eSi-Connect offers an extensive suite of AMBA-compliant peripheral IPs designed to streamline SoC integration. This suite encompasses versatile memory controllers, standard off-chip interface support, and essential control functions. Its configurability and compatibility with low-level software drivers make it suitable for real-time deployment in complex system architectures, promoting reliable connectivity across various applications.
The HOTLink II Product Suite by Great River Technology is tailored for mission-critical avionics systems requiring robust data communication. It enables seamless data transfer and ensures consistent performance under high-stress operational environments. This suite incorporates advanced technologies to handle complex data streams effectively. It includes component options that enhance data throughput and communication efficiency, meeting stringent industry standards for avionics platforms. Designed with precision, the HOTLink II suite supports the integration and management of large datasets, ensuring that avionics systems can perform efficiently and reliably, crucial for modern aircraft and defense applications.
The Chipchain C100 is a pioneering solution in IoT applications, providing a highly integrated single-chip design that focuses on low power consumption without compromising performance. Its design incorporates a powerful 32-bit RISC-V CPU which can reach speeds up to 1.5GHz. This processing power ensures efficient and capable computing for diverse IoT applications. This chip stands out with its comprehensive integrated features including embedded RAM and ROM, making it efficient in both processing and computing tasks. Additionally, the C100 comes with integrated Wi-Fi and multiple interfaces for transmission, broadening its application potential significantly. Other notable features of the C100 include an ADC, LDO, and a temperature sensor, enabling it to handle a wide array of IoT tasks more seamlessly. With considerations for security and stability, the Chipchain C100 facilitates easier and faster development in IoT applications, proving itself as a versatile component in smart devices like security systems, home automation products, and wearable technology.
The THOR platform is a versatile tool for developing application-specific NFC sensor and data logging solutions. It incorporates silicon-proven IP blocks, creating a comprehensive ASIC platform suitable for rigorous monitoring and continuous data logging applications across various industries. THOR is designed for accelerated development timelines, leveraging low power and high-security features. Equipped with multi-protocol NFC capabilities and integrated temperature sensors, the THOR platform supports a wide range of external sensors, enhancing its adaptability to diverse monitoring needs. Its energy-efficient design allows operations via energy harvesting or battery power, ensuring sustainability in its applications. This platform finds particular utility in sectors demanding precise environmental monitoring and data management, such as logistics, pharmaceuticals, and industrial automation. The platform's capacity for AES/DES encrypted data logging ensures secure data handling, making it a reliable choice for sectors with stringent data protection needs.
The RISCV SoC developed by Dyumnin Semiconductors is engineered with a 64-bit quad-core server-class RISCV CPU, aiming to bridge various application needs with an integrated, holistic system design. Each subsystem of this SoC, from AI/ML capabilities to automotive and multimedia functionalities, is constructed to deliver optimal performance and streamlined operations. Designed as a reference model, this SoC enables quick adaptation and deployment, significantly reducing the time-to-market for clients. The AI Accelerator subsystem enhances AI operations with its collaboration of a custom central processing unit, intertwined with a specialized tensor flow unit. In the multimedia domain, the SoC boasts integration capabilities for HDMI, Display Port, MIPI, and other advanced graphic and audio technologies, ensuring versatile application across various multimedia requirements. Memory handling is another strength of this SoC, with support for protocols ranging from DDR and MMC to more advanced interfaces like ONFI and SD/SDIO, ensuring seamless connectivity with a wide array of memory modules. Moreover, the communication subsystem encompasses a broad spectrum of connectivity protocols, including PCIe, Ethernet, USB, and SPI, crafting an all-rounded solution for modern communication challenges. The automotive subsystem, offering CAN and CAN-FD protocols, further extends its utility into automotive connectivity.
Certus Semiconductor's Digital I/O solutions are engineered to meet various GPIO/ODIO standards. These versatile libraries offer support for standards such as I2C, I3C, SPI, JEDEC CMOS, and more. Designed to withstand extreme conditions, these I/Os incorporate features like ultra-low power consumption, multiple drive strengths, and high levels of ESD protection. These attributes make them suitable for applications requiring resilient performance under harsh conditions. Certus Semiconductor’s offerings also include a variety of advanced features like RGMII-compliant IO cells, offering flexibility for different project needs.
LightningBlu is a state-of-the-art multi-gigabit connectivity solution for high-speed rail networks, delivering continuous high-speed data transfer between trackside and train systems. This innovative solution works within the mmWave spectrum of 57-71 GHz and is certified for long-term, low-maintenance deployment. It seamlessly integrates with existing trackside networks to provide a stable, high-capacity communication bridge essential for internet access, entertainment, and real-time information services aboard high-speed trains. The LightningBlu system includes robust trackside nodes and compact train-top nodes designed for seamless installation, significantly enhancing operational efficiencies and passenger experience by providing internet speeds superior to traditional mobile broadband services. With aggregate throughputs reaching around 3 Gbps, LightningBlu sets the standard for rail communications by supporting speeds at which data demands are met with ease. Crucially, LightningBlu is a key component in transforming the railway telecommunications landscape, offering upgraded technology that enables uninterrupted and enhanced passenger digital services even in the busiest railways across the UK and USA. Through its advanced mmWave technology, it ensures that the connectivity needs of the modern commuter are met consistently and effectively, paving the way for a new era in transit communication.
The APB4 GPIO core from Roa Logic is a fully parameterized solution designed to provide a customizable number of general-purpose, bidirectional I/O pins. This core enables developers to define the I/O behavior precisely, adapting to a plethora of configurations to meet specific project requirements. It is essential for applications that require extensive interfacing capabilities, ensuring streamlined connectivity across multiple components. The GPIO core supports a range of operational modes, providing the flexibility to handle complex I/O operations. With capabilities like programmable drive strength and individual pin configuration, it offers a high degree of customization that can be tailored to precise application needs. Roa Logic’s offering enhances design functionality and accelerates development timelines by facilitating easy integration and application-specific optimization. This component serves as a cornerstone for designs requiring robust peripheral interaction, catering to both industrial projects and educational purposes. Its adaptability and ease of integration ensure it's an invaluable component in modern electronics design, adhering to the high standards expected in today's interconnected environments.
Sofics has verified its ESD protection clamps on technology nodes between 0.25um CMOS down to 3nm across various fabs and foundries. The ESD clamps are silicon and product proven in more than 5000 mass produced IC-products. The cells provide competitive advantage through improved yield, reduced silicon footprint and enable low-leakage, high-speed or high voltage tolerant interfaces. The Analog I/O clamp described in this document can be used for 3.3V pads in the TSMC 3nm FinFET technology. The ESD clamp is designed to provide 2kV HBM protection for 3.3V interfaces. It features a small silicon footprint.
The eSPI Master/Slave Controller adheres to the Enhanced Serial Peripheral Interface (eSPI) specification, facilitating communication either as a master or slave device within the eSPI protocol. It provides support for both the transaction and link layers of the eSPI bus, making it suitable for integration with a range of AMBA-compliant interconnect systems like AXI or AHB. This controller is particularly adept at bridging communications between various SPI devices and internal processing units, ensuring robust data exchange in complex system architectures.
Designed for the burgeoning field of wireless connectivity, the 802.15.4 Transceiver Core from RF Integration is targeted towards low-rate wireless personal area networks (LR-WPANs). This core provides the backbone for connecting devices in home automation, industrial monitoring, and consumer electronics applications. Capable of supporting IEEE 802.15.4 standards, including Zigbee, the core facilitates low-power data communication, which is essential for devices where energy efficiency is paramount. The transceiver's design emphasizes reduced power consumption while maintaining robust wireless communication, making it an ideal choice for battery-powered devices. The flexibility of this core allows it to be integrated with various systems, enhancing the functionality of networked devices through secure and reliable connections. By leveraging RF Integration's expertise, this transceiver core not only meets the demand for energy-efficient solutions but also paves the way for future advancements in the Internet of Things (IoT).
Secure Protocol Engines by Secure-IC focus on enhancing security and network processing efficiency for System-on-Chip (SoC) designs. These high-performance IP blocks are engineered to handle intensive security tasks, offloading critical processes from the main CPU to improve overall system efficiency. Designed for seamless integration, these modules cater to various applications requiring stringent security standards. By leveraging cryptographic acceleration, Secure Protocol Engines facilitate rapid processing of secure communications, allowing SoCs to maintain fast response times even under high-demand conditions. The engines provide robust support for a broad range of security protocols and cryptographic functions, ensuring data integrity and confidentiality across communication channels. This ensures that devices remain secure from unauthorized access and data breaches, particularly in environments prone to cyber threats. Secure Protocol Engines are integral to designing resilient systems that need to process large volumes of secure transactions, such as in financial systems or highly regulated industrial applications. Their architecture allows for scalability and adaptability, making them suitable for both existing systems and new developments in the security technology domain.
The SPI Master/Slave Controller provides a comprehensive solution for serial communication via the SPI protocol, supporting both master and slave configurations. It is designed to interact seamlessly with AMBA interconnect protocols such as AXI, AHB, and APB, offering flexibility in connecting microprocessors to a wide range of SPI-enabled devices. The controller is well-suited for use in environments where efficient and reliable data transfer is critical, enhancing system functionality with options for programmability and integration ease.
The UDP Offload Engine is an advanced FPGA IP Core tailored for high-speed communication needs, supporting a wide spectrum of Ethernet speeds ranging from 10 GbE to 400 GbE. It efficiently manages the UDP protocol stack offloading UDP operations from software to hardware, which significantly enhances data throughput and minimizes processor utilization. This IP core adheres to established UDP/IPv4 standards, incorporating advanced features like checksum computation, segmentation, reassembly, and L4 UDP multicast pre-selection, making it exceptionally suitable for high-performance network environments where efficiency and reliability are paramount. Its compatibility with industry-standard Ethernet MACs facilitates seamless integration into existing network architectures. Designed to support Super-Jumbo Frames and featuring an arbitrary datagram PDU limit up to 64K Bytes, the UDP Offload Engine delivers a robust solution for network and communication applications, prominently reducing overhead and providing swift yet reliable data transfer capabilities beneficial for modern networking tasks.
This library is a production-quality, silicon-proven I/O library in TSMC 12nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V or 3.3V, dynamically selectable at the system level. Also included are various open-drain I/Os and hot plug detects capable of up to 5V operation. The library also includes a wide-variety of low-capacitance RF and analog ESD. There have operating ranges from 0 to 5V protection and support a wide range of high-performance interfaces including HDMI, LVDS, USB and wireless front-ends. Also included is a range of IEC 61000-4-2 system-level ESD protection that supports digital and analog I/O cells.
Photowave optical communications hardware is expertly crafted for the emerging needs of AI memory applications requiring disaggregated resources. Specifically engineered to be compatible with PCIe 5.0/6.0 and CXL 2.0/3.0, Photowave capitalizes on photonics to provide superior latency and energy efficiency. This technology is a game-changer for data centers, offering managers the ability to scale resources flexibly either within individual racks or across multiple server racks, paving the way for more adaptive and powerful data management solutions. By embracing the fundamental strengths of photonics, Photowave empowers large-scale computing systems to achieve previously unattainable levels of efficiency and responsiveness. This optical communication solution ensures seamless integration with state-of-the-art computing infrastructure, thus facilitating the shift towards more intelligent and modular computing environments which underpin the growth of AI-driven applications. The Photowave hardware is meticulously designed to uphold the highest standards in optical communication, ensuring fast data transfer capabilities that drastically reduce latency and improve the overall performance of computing tasks. In environments where swift and reliable data processing is paramount, Photowave stands out as a crucial component, helping optimize technological investments and boost the performance of AI and machine learning workloads.
Sofics has verified its ESD protection clamps on technology nodes between 0.25um CMOS down to 3nm across various fabs and foundries. The ESD clamps are silicon and product proven in more than 5000 mass produced IC-products. The cells provide competitive advantage through improved yield, reduced silicon footprint and enable low-leakage, high-speed or high voltage tolerant interfaces. The Analog I/O clamp described in this document can be used for 3.3V pads in the TSMC 7nm FinFET technology. The ESD clamp is designed to provide 2kV HBM protection for 3.3V interfaces. It features a small silicon footprint.
DapTechnology's FireSpy Bus Analyzer series represents the culmination of extensive R&D in IEEE-1394 and AS5643 standards. These analyzers provide robust tools for analyzing IEEE-1394 networks, offering critical insights into bus transactions. The FireSpy analyzers are engineered to handle different bus configurations, ranging from single to multi-bus setups, making them versatile tools for monitoring and diagnostics across various applications. The FireSpy family of analyzers is designed to support the integration of Mil1394 protocol modules, which is critical for aerospace and defense industries. By delivering in-depth data analysis and high-level diagnostic capabilities, these analyzers help optimize network performance and troubleshoot issues effectively. With the release of their 4th generation, DapTechnology has pushed the boundaries with enhanced functionality and performance, setting a new standard for IEEE-1394 bus analyzers. The FireSpy analyzers excel in versatility and scalability. They cater to a broad spectrum of use cases, equipping users with the means to adapt to diverse testing environments. Incorporating IEEE-1394 protocols with high precision, these devices extend beyond mere analysis, facilitating extensive network simulations and testing, essential for developing reliable, high-performance IEEE-1394 networks.
The I2C Master/Slave Controller is a highly adaptable IP core designed to interface a microprocessor with an I2C bus system, supporting both master and slave roles. Capable of operating in various speed modes including Standard, Fast, Fast Plus, and High-Speed, this controller adheres to the latest NXP I2C specifications, providing extensive system-level integration features for varied applications. It is ideal for scenarios demanding precise I2C protocol compliance and robust data transactional support.
The FireCore PHY & Link Layer solutions from DapTechnology provide state-of-the-art components crucial for implementing IEEE-1394 and AS5643 standards. Designed for adaptability, these solutions cater to multiple FPGA families, offering a combined PHY and LLC (Link Layer Controller) approach. They efficiently operate across a range of transmission speeds (S100 to S3200), making them valuable assets in various high-speed data environments. FireCore solutions are crafted with a focus on flexibility and reliability. They encompass significant enhancements such as configurable PHY ports, bit error injection, and rate testing features, catering to the diverse needs of modern digital communications. By integrating these dynamic capabilities, DapTechnology’s FireCore solutions improve packet management and overall network efficiency. Through continuous innovation, FireCore solutions have fortified DapTechnology's position as a leader in IEEE-1394 and Mil1394 technologies. These components provide the foundational architecture for performance-driven application in critical systems, especially within industries demanding high standards of data integrity and speed.
The INAP375R Receiver is a component of the APIX2 technology suite, tailored to meet the stringent demands of automotive infotainment systems. It supports bi-directional, high-speed data transfer over a single twisted pair cable, up to distances of 12 meters, offering flexibility for complex vehicle architectures. The receiver integrates advanced error correction protocols and supports RGB and LVDS video interfaces, making it ideal for high-definition display applications in vehicles.
MIFARE Certification Technologies provide a comprehensive suite for certification related to mobile and IoT platforms. This technology is at the forefront of ensuring compliance and reliability in embedded systems used within public transportation and personal devices. It focuses on ensuring that devices meet rigorous global standards for communication and data transfer security. Utilizing robust protocols, these technologies facilitate seamless integration with existing infrastructures, promoting enhanced accessibility and user experience. The certification process involves extensive validation checks to ensure system integrity, sustainability, and efficient operation within diverse environments. By certifying embedded software, it supports manufacturers in achieving compliance with regulatory requirements, empowering them with a market advantage. This technology is essential for companies looking to maintain competitive status by ensuring their products meet necessary communication standards. It demonstrates a commitment to quality and security in data handling, solidifying a product's credibility and operational reliability. MIFARE Certification Technologies pave the way for future-ready solutions, blending technological prowess with market needs.
Digital IP Solutions from MosChip include a wide range of digital components used in the creation of integrated circuits and systems. These solutions are tailor-made to fulfill specific design criteria, ensuring optimal performance and efficiency in electronic products. The portfolio encompasses modules that facilitate functions such as data processing, signal conversion, and system integration, allowing manufacturers to achieve superior design outcomes. Each module is created with a focus on scalability and robustness, catering to the diverse needs of industries such as automotive, consumer electronics, and telecommunications. The Digital IP Solutions are instrumental in boosting the processing power and performance reliability of devices, which are core to the demands of advanced computing environments. Moreover, the flexibility and customizability of these solutions allow them to be seamlessly integrated into existing architectures, enhancing both speed and functionality. As technology advances, the importance of adaptable, high-performance digital solutions will continue to grow, making these modules critical to the success of future electronic products.
Sofics has verified its ESD protection clamps on technology nodes between 0.25um CMOS down to 3nm across various fabs and foundries. The ESD clamps are silicon and product proven in more than 5000 mass produced IC-products. The cells provide competitive advantage through improved yield, reduced silicon footprint and enable low-leakage, high-speed or high voltage tolerant interfaces. The Analog I/O clamp described in this document can be used for 2.5V pads in the TSMC 5nm FinFET technology. The ESD clamp is designed to provide 2kV HBM protection for 2.5V interfaces. It features a small silicon footprint.
The MIPI solutions crafted by L&T Technology Services cater specifically to the demands of mobile component integration, adhering strictly to MIPI standards. These solutions are formulated to enhance the interaction between various mobile components, which is crucial for ensuring seamless operations within smartphones and tablets. By focusing on optimized data transfer and communication protocols, these MIPI solutions significantly improve the efficiency and performance of mobile devices. They cater to the demands of high-speed, real-time communication, supporting the latest advancements in mobile technology. In essence, they facilitate an environment where multiple components can interact harmoniously, contributing to smoother mobile experiences. LTTS’s MIPI solutions are crucial for manufacturers looking to push the boundaries of mobile component integration, providing the key to unlocking enhanced functionality and usability within devices. The solutions are further characterized by their flexibility and adaptability, accommodating the rapid technological changes inherent in the mobile industry, ensuring devices remain competitive and operationally efficient.
The Bluetooth Low Energy (BLE) Wireless Sensor Network Library provides a comprehensive solution for designing and implementing low-power wireless sensor networks. This library is ideal for applications where energy efficiency is critical, such as in IoT devices and wearable technology. BLE technology enables devices to communicate wirelessly over short distances while consuming minimal power, making the library an essential tool for developers looking to integrate BLE capabilities into their products. The library simplifies the development process with a broad suite of functions and protocols that ensure reliable and effective network performance. By supporting a variety of sensor types and configurations, the library enhances the capability of IoT systems to monitor and analyze data efficiently. Its applications range from smart home devices to industrial monitoring systems, underscoring the versatility and utility of BLE in modern technology solutions.
The LineSpeed FLEX Family encompasses a range of 100G PHY products designed to facilitate high-speed communications across various interfaces, including retiming, gearbox functions, and multiplexing. These products comply with industry standards, such as IEEE, offering wide-ranging compatibility for diverse networking environments. Notably, the family supports a variety of data rates from 10G to 100G, allowing for mixed and independent port speeds. The retimers in particular are protocol-independent, providing a flexible solution adaptable to many networking configurations, particularly in line cards and modules, where space and efficiency are critical. The LineSpeed FLEX products also feature robust error correction capabilities, including on-chip RS-FEC. This assures data integrity across extensive network infrastructures, thus mitigating signal degradation over long distances. By simplifying the integration process and ensuring consistent performance, LineSpeed FLEX is integral to modern network practices, accommodating dense 10G Ethernet configurations and high-reliability systems.
This library is a production-quality, silicon-proven I/O library in TSMC 16nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V or 3.3V, dynamically selectable at the system level. Also included are various open-drain I/Os and hot plug detects capable of up to 5V operation. The library also includes a wide-variety of low-capacitance RF and analog ESD. There have operating ranges from 0 to 5V protection and support a wide range of high-performance interfaces including HDMI, LVDS, USB and wireless front-ends. Also included is a range of IEC 61000-4-2 system-level ESD protection that supports digital and analog I/O cells.
The I2C IP module is engineered to deliver highly efficient inter-device communication in embedded systems. It supports streamlined data transactions in a multitude of operating conditions, making it crucial for applications where reliable low-speed data exchange is necessary. Designed for adaptability and ease of integration, the I2C IP enables effective communication across components, enhancing system connectivity and performance. It is versatile in design, allowing it to fit seamlessly into diverse electronic environments, thereby supporting a wide variety of devices and applications. With a focus on minimizing power consumption, the I2C IP offers sustainable operations while delivering reliable performance. This balance of efficiency and functionality highlights its suitability for modern consumer electronics and automotive applications, among others, where power efficiency and data integrity are critical.
The High-Performance FPGA & ASIC Networking Product is engineered to seamlessly integrate into distributed systems that are essential in critical domains. This product leverages advanced hardware-based switch technology, utilizing a 10Gb backbone based on finite state machines. As a result, it guarantees high-efficiency performance metrics crucial for a range of industrial applications. Originally tailored for use in the aerospace sector, this networking product addresses key parameters such as safety certification, extensive cyber resilience, and frugality in power usage and weight. The design negates the need for conventional software-based processing, thus significantly lowering overall system workload and promoting energy efficiency, which is vital for heavily regulated sectors like avionics. Moreover, by incorporating advanced encryption capabilities using AES256 GCM and supporting an extensive array of protocols including Ethernet, AFDX, TSN, and others, the product ensures secure data handling. It also provides adaptable data aggregation and conversion features, making it an ideal match for complex system architectures requiring robust and responsive network functionalities. Exported beyond aerospace, this IP finds relevance across various sectors like automotive, naval, and infrastructure management, aligning with industry-specific needs such as cybersecurity, system integration, and compatibility with legacy systems.
EASii IC's CoaXPress IP stands out as a global leader in high-speed imaging data transmission used across professional and industrial imaging applications such as machine vision, medical imaging, and broadcasting. This IP leverages the simplicity of coaxial cabling combined with high-speed serial data transfer capabilities. CoaXPress provides a high-bandwidth, low-cost interface solution using coaxial cables for video acquisition peripherals. It supports high-speed data streams from multiple cameras with impressive GenICam compliance, endorsing a unified software interface for diverse camera types. EASii IC’s CoaXPress Device and Host IP cores are engineered to accommodate the latest standards, offering unparalleled integration for embedded systems. Designed with flexibility, CoaXPress IP includes dynamic device and link management, allowing it to seamlessly operate across multiple system configurations and supporting bidirectional, low-latency, high-precision communications. This versatility ensures its efficacy for large-scale, multistream video processing, capturing, and transmission requirements.
The SPI Slave core maintains full compliance with the SPI Standard looking to Motorola's M68H11 Reference Manual. It offers a sturdy option for serial communication within various applications, adhering to DO-254 standards for safe and reliable operation in critical systems.
The I2C Master IP Core is fully compliant with the I2C-bus Specification and User Manual Rev. 5. It supports Standard-mode, Fast-mode, and Fast-mode Plus (Fm+), allowing for versatile integration in electronic systems. Developed under DO-254 criteria, it promises reliability and accuracy in critical communication.
The I2C Slave IP core effectively implements an I2C Slave in accordance with I2C-bus Specification and User Manual Rev. 5, offering compatibility with Standard-mode, Fast-mode, and Fast-mode Plus (Fm+). Designed for high reliability in communication systems, it achieves full DO-254 compliance.
The INAP375T Transmitter is a high-speed data transmission solution specifically designed for the automotive industry. It employs the second generation APIX2 technology, which delivers high-speed differential data through a single twisted pair cable, supporting data rates up to 3Gbps. This transmitter can handle complex multimedia data like video and audio while maintaining robust error correction through the AShell protocol, ensuring reliable data communication within vehicles.
The SPI Master core, entirely compliant with SPI Standard as outlined in Motorola’s M68H11 Reference Manual, provides a dependable interface for serial communication. Its design conforms to DO-254 standards, making it a robust choice for diverse fields requiring precise data exchange systems.
The D68HC11F is a synthesizable SOFT Microcontroller IP Core, fully compatible with the Motorola 68HC11F1 industry standard. It can be used as a direct replacement for the 68HC11F1 Microcontrollers. Major peripheral functions are integrated on-chip, including an asynchronous serial communications interface (SCI) and a synchronous serial peripheral interface (SPI). The main 16-bit, free-running timer system includes input capture and output-compare lines, and a real-time interrupt function. An 8-bit pulse accumulator subsystem counts external events or measures external periods. Self-monitoring on-chip circuitry protects the D68HC11F against system errors. The Computer Operating Properly (COP) watchdog system and illegal opcode detection circuit provide extra security features. Two power-saving modes, WAIT and STOP, make the IP core especially attractive for automotive and battery-driven applications. Additionally, the D68HC11F can be equipped with an ADC Controller, offering compatibility with external ADCs. Its customizable nature means it's delivered in configurations tailored to need, avoiding unnecessary features and silicon waste. The D68HC11F also includes a fully automated test bench and comprehensive tests for easy SoC design validation. It supports DCD’s DoCD™, a real-time hardware debugger, for non-intrusive debugging of complete SoCs. This IP Core is technology agnostic, ensuring 100% compatibility with all FPGA and ASIC vendors.
The I2C Master/Slave Controller from Atria Logic caters to efficient inter-device communication through its comprehensive adaptation of the I2C protocol. This two-wire bus system utilizes serial data and clock lines, facilitating seamless data exchanges across various embedded system interfaces, including AHB and APB fabrics. Designed for integration ease, this controller IP supports a multitude of functionalities, from setting configurable bus speeds to detecting multiples and synchronization of clock domains. Its adaptability and efficiency make it pivotal for embedded systems requiring robust data handling capabilities across diverse use cases in consumer electronics and industrial applications.
DapTechnology's FireCore Extended solution builds upon their basic offering, integrating advanced IEEE-1394 and AS5643 functionalities. This robust solution adds the versatility needed for complex data environments, facilitating high-speed data encapsulation and detailed network diagnostics critical for modern avionics. The Extended version incorporates additional features, such as enhanced error detection and comprehensive status monitoring that extend beyond the basic requirements. It allows for configurable host interfaces, providing flexibility in system integration, and supports DMA operations for improved data throughput. These features make it an indispensable tool for handling complex network tasks efficiently. FireCore Extended serves as a strategic component in high-demand applications, offering not only expanded configurations but also refined control over data management processes. Its inclusion in DapTechnology’s suite exemplifies the company’s dedication to pushing technological boundaries and setting benchmarks within the IEEE-1394 and Mil1394 standard frameworks.
The FireCore GPLink solution by DapTechnology provides customizable IEEE-1394 and AS5643 link-layer functionalities. Tailored for sophisticated data environments, GPLink facilitates intricate data pathway management, essential for advanced applications in aerospace and defense sectors. Offering enhanced functionality beyond the standard FireCore solutions, the GPLink version includes features like configurable bus management and precise timing controls. This allows for extended network capability while maintaining high data integrity and performance levels, making it ideal for integration into complex systems with demanding specifications. Adding depth to DapTechnology's line-up, FireCore GPLink is a testament to the firm's commitment to providing comprehensive and flexible IP solutions. These enhancements not only improve data transmission efficiencies but also support DapTechnology's ethos of delivering cutting-edge, reliable technology to their global client base.
The I3C Host/Device Dual Role Controller IP by Arasan enables efficient data communication between host processors and peripheral devices. Supporting dynamic address assignment, this IP simplifies the control of connected devices within a system. Backward compatible with I2C, it supports advanced features such as in-band interrupt handling and multi-lane data transfer, making it adaptable for a wide range of digital applications. The design ensures low power consumption while maintaining high performance, advantageous for applications in mobile and IoT sectors.
The FireLink GPLink variant of DapTechnology’s solutions provides advanced control over IEEE-1394 and AS5643 managed data communications. Designed for challenging data environments, it supports superior data management techniques essential for cutting-edge aerospace and defense systems. FireLink GPLink incorporates advanced networking features including customizable bus controls and accurate timing mechanisms. This allows it to integrate effectively with complex networks, providing essential flexibility and managing intricate data flows efficiently and reliably. Adding functionality, FireLink GPLink extends DapTechnology’s offering to meet the highest standards of data precision and control. This robust solution is pivotal for applications requiring dependable communication infrastructure, supporting the company’s mission to deliver state-of-the-art technological advancements in data management solutions.
FireGate by DapTechnology embodies cutting-edge advancements in IEEE-1394 high-speed data transmission. Designed to address limitations in traditional link speeds, it leverages evolving technologies to facilitate faster bus operations up to S3200, particularly advantageous for imaging and complex data applications. DapTechnology developed FireGate in response to the industry's demand for enhanced transmission capabilities, transcending the constraints of conventional solutions that max out at S800. This product exemplifies the company's forward-thinking approach, pioneering the delivery of high-bandwidth solutions critical for telemetry and data-heavy environments. The FireGate solution not only expands data throughput but also integrates advanced processing capabilities, thereby improving overall system efficiency. It represents DapTechnology's dedication to pushing industry standards forward, ensuring they remain at the forefront of IEEE-1394 and Mil1394 technological development and deployment.
This library is a production-ready I/O library built on the TSMC 12nm process. The library features 1.8V to 3.3V GPIOs with programmable drive strength, hysteresis, and control logic. It includes support cells for all power domains: 0.8V, 1.8V, and I/O and incorporates latch-up immune, JEDEC-compliant ESD structures. The library is designed for flip-chip packaging and includes vertical and horizontal variants to support all die edge orientations. All power domains include integrated power-on control (POC) cells for safe and reliable sequencing.
The I2S Controller from System Level Solutions offers a sophisticated interface for audio devices that require efficient communication. This controller is tailored for use in a variety of audio applications including digital signal processing and audio data streaming, providing a structured and reliable solution. It allows for seamless audio data interchange between digital devices, supporting high-resolution audio formats. The controller's design ensures minimal latency and high data integrity, crucial for maintaining superior audio quality in professional sound systems and consumer electronics. Moreover, its versatile architecture supports a range of applications and configurations, making it adaptable for different purposes and hardware setups. System Level Solutions' I2S Controller stands out with its commitment to performance, stability, and adaptability in audio data communication environments.
This is an ultra-low leakage library. The GPIO has a typical leakage of only 150pA from VDDIO and 1nA from VDD. The library has a GPIO and an ODIO. The GPIO cell set can be configured as input or output and has an internal 50K ohm pull-up or pull-down resistor. Cells for I/O and core power and ground with built-in ESD circuitry are included. A power-on-control circuit is integrated into an available VDDIO cell. The library includes pads for analog signals and a 6.5V one-time-programming voltage. The GPIO can do TX and RX up to 100MHz. The ODIO is I2C compliant. ESD targets are 2KV HBM / 500V CDM with 2KV IEC 61000-4-2 system stress capability.
This is an ultra-low leakage library. The GPIO has a worst-case leakage of only 425nA. It works with a wide VDDIO supply range from 1.8V to 3.3V during system operation without the need for the customer to manually switch between high and low-voltage modes. The GPIO cell set can be configured as input or output and has an internal 50K ohm pull-up or pull-down resistor. It has a sleep function which - when enabled - puts the I/O into an ultra-low power state and latches the I/O in the previous state. Cells for I/O, core power, and ground with built-in ESD circuitry are included. A power-on-control circuit is integrated into an available VDDIO cell. The GPIO can do TX and RX up to 150MHz. ESD targets are 2KV HBM / 500V CDM with 2KV IEC 61000-4-2 system stress capability.
This library is a mixed Digital and Analog library built for the TSMC 65nm process. It is based around a Fail-Safe General Purpose Input/Output (FSGPIO) cell that is compatible with both I2C and I3C protocols. The FSGPIO operates with a power supply of 1.0 to 1.2V and can tolerate external signals up to 3.3V. The library contains all the power, ground, and ESD cells to support the FSGPIO as well as an Analog I/O cell. The cells are laid out in an inline wirebond format.
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