All IPs > Multimedia > H.266
H.266 semiconductor IP represents a transformative advancement in multimedia technology, specifically in video compression. Also known as Versatile Video Coding (VVC), H.266 offers significant improvements over its predecessor, H.265, providing improved compression efficiency and superior video quality. This category of semiconductor IP is crucial for industries involved in video streaming, broadcasting, and any applications requiring high-quality video with minimal bandwidth usage.
The primary use of H.266 semiconductor IPs is to enable devices and systems to handle the latest video encoding and decoding tasks with remarkable efficiency. These IP solutions are particularly beneficial for deploying high-resolution video content, such as 4K and 8K video, with reduced file sizes without sacrificing visual fidelity. Such capabilities are essential for streaming platforms, video conferencing tools, and more advanced applications like virtual reality, where high-definition video is a necessity.
Within this category, you'll find a range of products including highly optimized encoder and decoder cores, providing flexible and scalable solutions tailored to different processing power and bandwidth requirements. Additionally, there are comprehensive software and hardware IP solutions that support integration into consumer electronics, professional video equipment, and telecommunications infrastructure.
By adopting H.266 semiconductor IPs, companies can ensure their devices remain at the cutting edge of multimedia technology, offering end-users an unparalleled viewing experience while optimizing network resources. This enables stakeholders to meet increasing consumer demand for high-quality video streaming and real-time communications, placing them at the forefront of the digital entertainment and communication markets.
High-resolution Image Processing IP Performance 4K60p@400MHz (600MHz for display interface) Features Support various color format : YUV420, YUV422, YUV444, and RGB Up-/Down-scaler x1/8~x8 : selectable scaler algorithm with Bi-cubic and Lanczos Two scalers, connected to DRAM and display/direct I/F respectively, operating at different ratios at the same time (configurable to one scaler option) Color space conversion : YUV2RGB and RGB2YUV, coefficient downloadable Optional features Crop and digital zoom : scaling on cropped region Flip : horizontal and vertical 3rd Party interfaces: such as AFBC v1.2 and PVRIC v4 (support output only) Interface Display Interface : 3 channels for components with vertical/horizontal sync signal (ITU-R BT.601 compatible) Direct Interface (optional feature) : On-the-fly interface based on ready-valid protocol Support CF10 (Chips&Media’s Frame buffer compression) for Chips&Media video codec Support AFBC v1.2 and PVRIC v4 (optional feature) for output of MAPI
HEVC/H.265 Main/Main10/ Main Still Picture Profile @L5.2 AVC/H.264 BP/CBP/MP/HP/HP10 @L5.2 Capable of encoding up to 8K ((8192x4096) A 32-bit AMBA3 APB bus for host CPU system control 128-bit AMBA3 AXI for data transfer (Optionally, additional secondary AXI) Latency tolerance Low power consumption Programmability Configurable IP Multi-instances Frame buffer compression (CFrame) Rotation & Mirroring Bit-depth & chroma sub-sample conversion Background detection 3DNR Lambda table QP Map Custom mode decision, etc.
The DVB-C Modulator is specifically designed to perform modulations for head-end video and broadband data transmission systems, such as Cable Modem Termination Systems (CMTS). This modulator core is optimized for use in various cable modem test equipment and supports both point-to-point (PTP) and point-to-multipoint microwave radio links. It boasts compliance with the J83 standard modulation schemes, enhancing its flexibility and usability across different platforms.
The ISDB-T 1-Segment Tuner from RF Integration is specially crafted to cater to digital broadcasting needs, particularly for mobile and handheld devices. This tuner is integral to receiving broadcast signals compliant with the ISDB-T standard, ensuring you have access to digital television and other mobile multimedia services. Designed with emphasis on power efficiency, the tuner is well-suited for use in a variety of portable devices, including smartphones and tablets, where battery life is a critical concern. It manages to combine low power usage with high performance, ensuring clear reception and processing of broadcast signals even in challenging conditions. The tuner's architecture incorporates advanced RF components that facilitate excellent signal acquisition and fidelity, essential for an enjoyable viewing experience. RF Integration's expertise in RF and analog designs is evident in this product, ensuring it stands out in the competitive field of digital broadcast technology. With the capability to handle fluctuating signal conditions, the ISDB-T 1-Segment Tuner is a reliable component for any modern media device.
Video Codec Standard AV1: Main/High profile @ L6 Main tier 50Mbps Professional profile except 12-bit @ L6 Main tier 50Mbps Mono/YUV420/YUV422/YUV444 8-/10-bit HEVC/H.265: Main/Main 10/Main 4:2:2 10 profile @ L6 High tier Main 4:4:4/Main 4:4:4 10 profile @ L6 High tier (Only support 4:2:0 coding tools, high precision weighted prediction, and chroma QP offset list) AVC/H.264: Baseline/Constrained Baseline/Main/High/High10 profile @ L6 High 10 Intra/High 4:2:2/High 4:2:2 Intra profile with frame_mbs_only_flag = 1 @ L6 High 4:4:4 Predictive/High 4:4:4 Intra/CAVLC 4:4:4 Intra profile @ L6 with: frame_mbs_only_flag = 1 bit_depth_luma ≤ 10 bit_depth_chroma ≤ 10 frame_mbs_only_flag = 1 and qpprime_y_zero_transform_bypass_flag = 0 VP9 (Decoder only): Profile 0 and Profile 2 (12-bit not supported), YUV420 8/10-bit Performance 4K120fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Rotate/Mirror Down-scaler Crop Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (optional AXI can be used to alleviate bandwidth usage.)
The HDR Core is engineered to deliver enhanced dynamic range image processing by amalgamating multiple exposures to preserve image details in both bright and dim environments. It has the ability to support 120dB HDR through the integration of sensors like IMX585 and OV10640, among others. This core applies motion compensation alongside detection algorithms to mitigate ghosting effects in HDR imaging. It operates by effectively combining staggered based, dual conversion gain, and split pixel HDR sensor techniques to achieve realistic image outputs with preserved local contrast. The core adapts through frame-based HDR processing even when used with non-HDR sensors, demonstrating flexibility across various imaging conditions. Tone mapping is utilized within the HDR Core to adjust the high dynamic range image to fit the display capabilities of devices, ensuring color accuracy and local contrast are maintained without introducing noise, even in low light conditions. This makes the core highly valuable in applications where image quality and accuracy are paramount.
HEVC/H.265 - Main/Main10 Profile @L5.1 AVC/H.264 - BP/CBP/MP/HP/HP10 Profile @ L5.2 Capable of decoding up to 4K60fps (8192x4096) A 32-bit APB bus and 128-bit AMBA3 AXI buses (w/ additional secondary AXI) Burst Write Back Map converter Low delay Low power consumption Configurable IP Latency tolerance Programmability Multi-instances Frame buffer compression (CFrame) Secondary AXI interfaces Downscaler (on-the-fly mode)
The Universal QAM/PSK Modulator is an adaptable core designed for broadband point-to-point and point-to-multipoint applications. It delivers versatile modulation capabilities that are compatible with IEEE 802.16.x Wireless MAN-SC and 802.15.3 Wireless PAN standards. By supporting varied applications, this modulator ensures reliable and efficient wireless communication across diverse platforms. Its robust framework enables seamless modulation processes suited for both small-scale and extensive network operations, optimizing wireless signal transmission.
Video Codec Standard HEVC/H.265: Main profile @ L5.1 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High profile @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard HEVC: Main/Main Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High profiles @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 4096 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Multi-instances Frame-buffer compression (CFrame) In-loop filter Rotation & Mirroring Bit depth & chroma sample format conversion Lossless coding Background coding MapConverter 3DNR, etc. Interface 32-bit AMBA3 APB bus 128-bit AMBA3 AXI buses Primary AXI interface and an optional secondary AXI interface
The MPEG-H Audio System is an advanced audio codec system designed for television and virtual reality applications. It delivers immersive, high-quality sound that enhances user experiences by providing dynamic and interactive audio environments. This technology is a staple in broadcast and VR industries, known for its ability to offer personalized soundscapes and adjust sound levels and positions in real time. MPEG-H Audio works across various platforms, offering compatibility with modern broadcasting standards, making it a preferred choice for broadcasters seeking to upgrade their audio offerings. Its seamless integration into devices elevates content delivery, supporting the next-generation TV audio standards worldwide and ensuring a comprehensive auditory experience for viewers. Beyond its technical superiority, the MPEG-H Audio System is also recognized for its scalability and adaptiveness in diverse application conditions, ranging from live broadcasts to VR environments. By enabling customizable audio settings, it provides individual listeners with tailored audio experience, making it a cutting-edge tool for content creators focused on maximizing audience engagement through sound.
Designed for maximum compatibility and efficiency, the ATSC 8-VSB Modulator serves both professional TV network applications and custom point-to-point radio links. Its comprehensive compliance with ATSC A/53 8-VSB standards guarantees reliable performance across multiple broadcast scenarios. The modulator's versatile design supports varied operational environments, making it indispensable for broadcasters who require versatile and robust transmission solutions. Its emphasis on delivering flawless signal integrity ensures top-notch broadcast quality for diverse applications.
Video Codec Standard HEVC: Main/Main Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High profiles @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 4096 Min resolution: 256 x 128 Bit depth: 8-bit Features Multi-instances Frame-buffer compression (CFrame) In-loop filter Rotation & Mirroring Bit depth & chroma sample format conversion Lossless coding Background coding Down-scaler (On-the-fly mode) MapConverter 3DNR, etc. Interface 32-bit AMBA3 APB bus 128-bit AMBA3 AXI buses Primary AXI interface and an optional secondary AXI interface
Video Codec Standard AV1: Main profile @ L5.1 HEVC: Main/Main10 profile, Main/Main 10 Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High/High 10 profile @ L5.2 (Interlaced coding tools are not supported) Performance 4K60fps@500MHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture encoding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer * Optional AXI can be used to alleviate bandwidth usage
The ISDB-T Modulator delivers robust capabilities for both professional TV networks and custom point-to-point radio links. This modulator core is fully compliant with ARIB STD-B31 and ABNT NBR 15601, ensuring compatibility across a broad range of broadcasting applications. Its adaptable framework makes it suitable for diverse broadcast needs, facilitating the efficient transmission of digital television signals. Through this, broadcasters can achieve a more reliable and consistent service quality across different market segments.
Video Codec Standard HEVC: Main/Main10 profile @ L6 High tier AVC: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 (Interlaced coding tools are not supported) Performance 4K120fps@500MHz or 8K60fps@1GHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture encoding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer *Optional AXI can be used to alleviate bandwidth usage
The DVB-T2 Modulator stands out with its powerful FPGA or ASIC implementation, designed to perform efficient modulation as per the DVB-T2 ETSI EN302 755 standards. This comprehensive solution encompasses all necessary functions to facilitate high-performance terrestrial broadcasts. The modulator is crafted for use in a range of broadcast networks, offering flexibility and adaptability in its application. This makes it a go-to solution for broadcasters aiming to leverage the power of DVB-T2 technology to deliver superior terrestrial broadcast services.
The Multi-channel ATSC 8-VSB Modulator enhances broadcasting flexibility by supporting multiple channels within ATSC A/53 8-VSB standards. Tailored to meet professional TV network and custom point-to-point radio link needs, this modulator core facilitates complex broadcast operations. It enables seamless integration and high-quality signal transmission across varied operational environments. By efficiently managing multiple channels, it empowers broadcasters to optimize signal delivery and enhance their overall transmission capabilities.
The Column A/D Converter by CURIOUS Corporation is meticulously crafted for use with Image Sensors, enhancing the efficiency and accuracy of signal processing in imaging applications. This converter is integral to digital imaging systems, providing the capability to convert analog signals into digital data with high precision. One of the standout features of this product is its implementation of the Warp & Walk algorithm, which allows simultaneous high-speed and high-accuracy conversions. By integrating this unique processing method, the converter achieves minimal error rates and is capable of handling quick transitions, making it suitable for cutting-edge imaging solutions like digital cameras and industrial imaging systems. Engineers will appreciate its compact design, which enables seamless integration into tight spaces without compromising performance. The Column A/D Converter supports multiple resolutions and ensures compatibility with a broad range of image sensors, demonstrating its versatility in meeting diverse technological demands.
The Multi-channel DVB-C Modulator expands on the versatility of its predecessor by supporting multiple channels simultaneously. It is targeted at head-end video and broadband data transmissions systems, including Cable Modem Termination Systems (CMTS), and is also effective for use in cable modem test equipment. Like the single-channel version, it is suited for point-to-point (PTP) or point-to-multipoint microwave radio links, making it a robust choice for dynamic broadcast environments. Its ability to process multiple channels helps in streamlining operations within complex broadcast systems.
Video Codec Standard HEVC/H.265: Main profile @ L5.1 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High profile @ L5.2 Performance 4K60fps@500MHz with a single-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard AV1: Main profile @ L5.1 Main tier 50Mbps HEVC/H.265: Main/Main 10 profile @ L5.1 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High10 profile @ L5.2 (Interlaced coding tools are not supported.) VP9 (Decoder only): Profile 0 and Profile 2 (12-bit not supported) Performance 4K60fps@500MHz with a single-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Supported standards for Decoder ISO/IEC23008-2 HEVC/H.265, ITU-T Rec. H.265 Main/Main10 Profile L5.1 AVC/H.264 BP/CBP/MP/HP/HP10 Profile @ L5.2 AVS2 Main/Main10 Profile @L8.0.60 Main performance 4K(3840x2160) 60fps @ 450MHz Max. resolution: 8192x4096 Features Frame buffer compression (CFrame) Embedded Post-processing (w/Down-scaler) Low delay Low power consumption Latency tolerance Interface AMBA 32-bit APB interface for Host CPU AMBA 128-bit AXI interface for the external memory
Video Codec Standard AV1: Main profile @ L6 Main tier 50Mbps HEVC/H.265: Main/Main10 profile @ L6 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 VP9 (Decoder only): Profile 0 and Profile 2 (12-bit not supported) Performance 4K120fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Brief specification HEVC/H.265 Main/Main10 Profile @L5.1 AV1 Main Profile @ L5.1 VP9 Profile 0/ Profile 2 @L5.1 AVC/H.264 BP/CBP/MP/HP/HP10 Profile @ L5.2 AVS2 Main/Main10 Profile @L8.0.60 Main performance 4K(3840x2160) 60fps @ 450MHz Max. resolution: 8192x4096 System I/F A 32-bit APB bus and 128-bit AMBA3 AXI buses (w/additional Secondary AXI) Burst Write Back (BWB) Features Frame buffer compression (CFrame) Embedded Post-processing (w/Down-scaler) Low delay Low power consumption Latency tolerance
Video Codec Standard AV1: Main profile @ L6 High tier HEVC/H.265: Main/Main10 profile @ L6 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 Performance 4K120fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (Optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard HEVC: Main/Main Still Picture profile @ L5.1 High tier AVC: Baseline/Constrained Baseline/Main/High profiles @ L5.2 Performance 4K60fps@500MHz Max resolution: 8192 x 4096 Min resolution: 256 x 128 Bit depth: 8-bit Features Multi-instances Frame-buffer compression (CFrame) In-loop filter Rotation & Mirroring Bit depth & chroma sample format conversion Lossless coding Background coding 3DNR, etc. Interface 32-bit AMBA3 APB bus 128-bit AMBA3 AXI buses Primary AXI interface and an optional secondary AXI interface
Decoding/Encoding Tools Support Extended Sequential ISO/IEC 10918-1 JPEG compliance Support one or three color components Three components in a scan (interleaved only) 8-bit and 12-bit samples for each component Support 4:2:0, 4:2:2, 4:4:0, 4:4:4 and 4:0:0 color formats Max. six 8x8 blocks in one MCU Support NV12/NV16/NV24 (CbCr Interleaved), NV21/NV61/NV42 (CrCb Interleaved) Support from 16 x 16 to 32K x 32K (32,768 x 32,768) image size Packed mode is supported 12-bit PPM format is supported Value-added Features Partial mode for encoding and decoding On-the-fly rotator/mirror ROI(Region of Interest) for decoding On-the-fly downsampler for decoding Color format converting for decoding Performance Decode up to 290M pix/s for 4:2:0 color format Encode up to 290M pix/s for 4:2:0 color format Operating clock frequency: 200MHz Ease of integration AMBA 32-bit APB (w/ PREADY) interface for communication with a host processor AMBA 64-bit AXI interface for the external memory
HEVC/H.265 Main/Main10 Profile @L5.1 AVC/H.264 BP/CBP/MP/HP/HP10 Profile @ L5.2 VP9 Profile 0/Profile 2 (HBD) AVS2 Main10 Profile @L8.0.60 Capable of decoding up to 4Kp60 (8192x4096) A 32-bit APB bus and 128-bit AMBA3 AXI buses (w/ additional secondary AXI) Burst Write Back Map converter Low delay Low power consumption Configurable IP Latency tolerance Programmability Multi-instances Frame buffer compression (CFrame) Downscaler (on-the-fly mode)
H.264, MVC, VP8, MPEG-1/2/4, VC-1, AVS, AVS+, H.263, Sorenson Decoding and encoding support at 1080p 60fps Supported standards for Decoder ISO/IEC 14496-10 AVC/H.264 BP/MP/HP@L4.2 ISO/IEC 14496-10/5 MVC Stereo High Profile@L4.1 ISO/IEC 14496-2 MPEG-4 SP,ASP@L6 SMPTE 421M-2006 VC-1 SP/MP/AP@L3 ISO/IEC 13818-2 MPEG-2 MP@HL ITU-T H.263(Annex I,J,K,T) AVS Jizhun @L6.2 AVS+ Guangdian @L6.2 On2 VP8 Sorenson Spark Theora Supported standards for Encoder ISO/IEC 14496-10 AVC/H.264 BP/MP/HP@L4.2 ISO/IEC 14496-10/5 MVC Stereo High Profile@L4.1 ISO/IEC 14496-2 MPEG-4 SP@L6 ITU-T H.263(Annex J,K,T) Supported Max. Resolution Supports up to 2048x2048 resolution Performance Single-stream H.264 HD(1920x1080p) 30fps decoding at <133MHz core clock H.264 HD(1920x1080p) 60fps decoding at <266MHz core clock H.264 HD(1920x1080p) 30fps encoding at <133MHz core clock H.264 HD(1920x1080p) 60fps encoding at <266MHz core clock Multi-stream Dual H.264 HD(1920x1080p) 30fps decoding at <266MHz core clock Dual H.264 HD(1920x1080p) 30fps encoding at <266MHz core clock 6SD/D1(NTSC&PAL) 30fps decoding at <133MHz core clock Full HD(1080p) encoding and decoding at <266MHz core clock Encoding Tools Selective [+/-64,+/-48] Quarter-pel and half-pel accuracy motion estimation using a full- search algorithm Flexible bit-rate control CBR VBR Fixed QP CABAC/CAVLC for AVC/H.264 Built-in pre- rotation/mirroring function 90xn degree rotation Vertical/horizontal mirroring Decoding Tools CABAC/CAVLC for AVC/H.264 MPEG-4 AC/DC prediction AVC/H.264 intra-prediction In-loop deblocking filter for H.264, H.263, and AVS Overlapped smoothing filter for VC-1 Built-in post-processing function 90xn degree rotation Vertical/horizontal mirroring De-ringing De-blocking filter for MPEG-2/4 Interface AMBA 32-bit APB interface for Host CPU AMBA 64-bit AXI interface for the external memory
Video Codec Standard HEVC/H.265: Main/Main 10 profile @ L6 High tier AVC/H.264: Baseline/Constrained Baseline/Main/High/High 10 profile @ L6 Performance 4K120fps@500MHz or 8K30fps@500MHz with a dual-core 4K240fps@1GHz or 8K60fps@1GHz with a dual-core Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit-depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer (optional AXI can be used to alleviate bandwidth usage.)
Video Codec Standard AV1: Main Profile @ L5.1 Performance 4K60fps@500MHz Max resolution: 8192 x 8192 Min resolution: 256 x 128 Bit depth: 8-/10-bit depth Features Frame buffer compression (FBC) Multi-instances 3rd Party I/F Bit-depth and YUV format conversion of the source picture Encoder Features I/P/B picture coding Picture/Block level of rate control ROI coding Background coding Interface AMBA3 32-bit APB I/F for host I/F AMBA3 128-bit AXI for data transfer * Optional AXI can be used to alleviate bandwidth usage
The K3000 Vector Graphics Processor is tailored for delivering top-notch 2D graphics performance, particularly focusing on embedded devices. It supports APIs like OpenVG1.1, providing smooth and seamless 2D vector graphics rendering across various platforms. This processor is known for its high power efficiency and reduced footprint, making it suitable for portable devices and embedded systems. With robust compatibility for interfacing with digital displays, the K3000 is an optimal choice for UI-driven applications where power and performance are key.
H.264, MVC, VP8, MPEG-1/2/4, VC-1, AVS, AVS+, H.263, and Sorenson decoder HW IP for 2Kp60, 4:2:0 Standards AVC/H.264 BP/CBP/MP/HP L.4.1 Max: 1920x1088; Min: 16x16 MVC SHP L.4.1 Max: 1920x1088; Min: 16x16 MPEG-4 SP/ASP L.5 Max: 1920x1088; Min: 16x16 H.263 Profile 3 Max: 1920x1088; Min: 16x16 VC-1 SP/MP/AP L.3 Max: 1920x1088 or 2048x1024 Min: 16x16 MPEG-1/2 MP L.high Max: 1920x1088; Min: 16x16 Sorenson Spark Max: 1920x1088; Min: 16x16 VP8 WebM/WebP Max: 1920x1088; Min: 16x16 Theora Max: 1920x1088; Min: 16x16 AVS Jizhun/Guangdian L6.2 Max: 1920x1088; Min: 16x16 Features Frame buffer compression (CFrame) Low delay decoding Configurable IP Programmability Low power consumption Frame-based processing Multi-instances Latency tolerance Burst Write Back Down-scaler (on-the-fly mode) Map converter MPEG-2/4 De-ringing Built-in de-blocking filter A 32-bit AMBA3 APB bus and 64-bit AMBA3 AXI buses (w/additional Secondary AXI buses)
The Multi-format Video Deinterlacer from Zipcores is a sophisticated core designed to convert interlaced video signals into progressive-scan streams, a process critical in enhancing video playback quality. This core supports multiple video formats, offering compatibility with a wide range of broadcasting and playback devices. It efficiently processes high-definition video streams, ensuring clarity and smoothness by implementing advanced deinterlacing algorithms. These processes are vital for eliminating typical interlacing artifacts such as flickering and line aliasing, improving visual experiences across various media. The core's design prioritizes compatibility and ease of integration into existing systems, promoting quick deployment in modern video applications. It is suitable for application in television broadcasting, film production, and consumer electronics, providing a reliable solution for companies seeking to enhance their video processing capabilities without substantial hardware expenditure.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
No credit card or payment details required.
Join the world's most advanced AI-powered semiconductor IP marketplace!
It's free, and you'll get all the tools you need to advertise and discover semiconductor IP, keep up-to-date with the latest semiconductor news and more!
Plus we'll send you our free weekly report on the semiconductor industry and the latest IP launches!