All IPs > Processor > Processor Cores
Processor cores are fundamental components in central processing units (CPUs) and systems-on-chip (SoCs) for a myriad of digital devices ranging from personal computers and smartphones to more specialized equipment like embedded systems. Within the category of Processor Cores, you'll find a diverse selection of semiconductor IPs tailored to meet the varying demands of speed, power efficiency, and processing capability required by today's technology-driven world.
Our Processor Cores category provides an extensive library of semiconductor IPs, enabling designers to integrate powerful, efficient, and scalable cores into their projects. These IPs are essential for firms aiming to innovate and achieve a competitive edge within the fast-evolving tech landscape. Whether you're developing high-performance computing solutions or aiming for energy-efficient mobile gadgets, our processor core IP offerings are designed to support a wide range of architectures, from single-core microcontrollers to multi-core, multi-threaded processors.
One of the primary uses of processor core IPs is to define the architecture and functions of a core within a chip. These IPs provide the blueprint for building custom processors that can handle specific applications efficiently. They cover a broad spectrum of processing needs, including general-purpose processing, digital signal processing, and application-specific processing tasks. This flexibility allows developers to choose IPs that align perfectly with their product specifications, ensuring optimal performance and power usage.
In our Processor Cores category, you'll discover IPs suited for creating processors that power everything from wearables and IoT devices to servers and network infrastructure hardware. By leveraging these semiconductor IPs, businesses can significantly reduce time-to-market, lower development costs, and ensure that their products remain at the forefront of technology innovation. Each IP in this category is crafted to meet industry standards, providing robust solutions that integrate seamlessly into various technological environments.
The Metis AIPU PCIe AI Accelerator Card is engineered for developers demanding superior AI performance. With its quad-core Metis AIPU, this card delivers up to 214 TOPS, tackling challenging vision applications with unmatched efficiency. The PCIe card is designed with user-friendly integration in mind, featuring the Voyager SDK software stack that accelerates application deployment. Offering impressive processing speeds, the card supports up to 3,200 FPS for ResNet-50 models, providing a competitive edge for demanding AI tasks. Its design ensures it meets the needs of a wide array of AI applications, allowing for scalability and adaptability in various use cases.
The Yitian 710 Processor is a groundbreaking component in processor technology, designed with cutting-edge architecture to enhance computational efficiency. This processor is tailored for cloud-native environments, offering robust support for high-demand computing tasks. It is engineered to deliver significant improvements in performance, making it an ideal choice for data centers aiming to optimize their processing power and energy efficiency. With its advanced features, the Yitian 710 stands at the forefront of processor innovation, ensuring seamless integration with diverse technology platforms and enhancing the overall computing experience across industries.
Speedcore embedded FPGA (eFPGA) IP represents a notable advancement in integrating programmable logic into ASICs and SoCs. Unlike standalone FPGAs, eFPGA IP lets designers tailor the exact dimensions of logic, DSP, and memory needed for their applications, making it an ideal choice for areas like AI, ML, 5G wireless, and more. Speedcore eFPGA can significantly reduce system costs, power requirements, and board space while maintaining flexibility by embedding only the necessary features into production. This IP is programmable using the same Achronix Tool Suite employed for standalone FPGAs. The Speedcore design process is supported by comprehensive resources and guidance, ensuring efficient integration into various semiconductor projects.
The Veyron V2 CPU represents Ventana's second-generation RISC-V high-performance processor, designed for cloud, data center, edge, and automotive applications. This processor offers outstanding compute capabilities with its server-class architecture, optimized for handling complex, virtualized, and cloud-native workloads efficiently. The Veyron V2 is available as both IP for custom SoCs and as a complete silicon platform, ensuring flexibility for integration into various technological infrastructures. Emphasizing a modern architectural design, it includes full compliance with RISC-V RVA23 specifications, showcasing features like high Instruction Per Clock (IPC) and power-efficient architectures. Comprising of multiple core clusters, this CPU is capable of delivering superior AI and machine learning performance, significantly boosting throughput and energy efficiency. The Veyron V2's advanced fabric interconnects and extensive cache architecture provide the necessary infrastructure for high-performance applications, ensuring broad market adoption and versatile deployment options.
The Quadric Chimera General Purpose Neural Processing Unit (GPNPU) delivers unparalleled performance for AI workloads, characterized by its ability to handle diverse and complex tasks without requiring separate processors for different operations. Designed to unify AI inference and traditional computing processes, the GPNPU supports matrix, vector, and scalar tasks within a single, cohesive execution pipeline. This design not only simplifies the integration of AI capabilities into system-on-chip (SoC) architectures but also significantly boosts developer productivity by allowing them to focus on optimizing rather than partitioning code. The Chimera GPNPU is highly scalable, supporting a wide range of operations across all market segments, including automotive applications with its ASIL-ready versions. With a performance range from 1 to 864 TOPS, it excels in running the latest AI models, such as vision transformers and large language models, alongside classic network backbones. This flexibility ensures that devices powered by Chimera GPNPU can adapt to advancing AI trends, making them suitable for applications that require both immediate performance and long-term capability. A key feature of the Chimera GPNPU is its fully programmable nature, making it a future-proof solution for deploying cutting-edge AI models. Unlike traditional NPUs that rely on hardwired operations, the Chimera GPNPU uses a software-driven approach with its source RTL form, making it a versatile option for inference in mobile, automotive, and edge computing applications. This programmability allows for easy updating and adaptation to new AI model operators, maximizing the lifespan and relevance of chips that utilize this technology.
Leveraging a high-performance RISC architecture, the eSi-3250 32-bit core efficiently integrates instruction and data caches. This makes it compatible with designs utilizing slower on-chip memories such as eFlash. The core not only supports MMU for address translation but also allows for user-defined custom instructions, greatly enhancing its flexibility for specialized and high-performance applications.
The xcore.ai platform by XMOS is a versatile, high-performance microcontroller designed for the integration of AI, DSP, and real-time I/O processing. Focusing on bringing intelligence to the edge, this platform facilitates the construction of entire DSP systems using software without the need for multiple discrete chips. Its architecture is optimized for low-latency operation, making it suitable for diverse applications from consumer electronics to industrial automation. This platform offers a robust set of features conducive to sophisticated computational tasks, including support for AI workloads and enhanced control logic. The xcore.ai platform streamlines development processes by providing a cohesive environment that blends DSP capabilities with AI processing, enabling developers to realize complex applications with greater efficiency. By doing so, it reduces the complexity typically associated with chip integration in advanced systems. Designed for flexibility, xcore.ai supports a wide array of applications across various markets. Its ability to handle audio, voice, and general-purpose processing makes it an essential building block for smart consumer devices, industrial control systems, and AI-powered solutions. Coupled with comprehensive software support and development tools, the xcore.ai ensures a seamless integration path for developers aiming to push the boundaries of AI-enabled technologies.
The Metis AIPU M.2 Accelerator Module is designed for devices that require high-performance AI inference in a compact form factor. Powered by a quad-core Metis AI Processing Unit (AIPU), this module optimizes power consumption and integration, making it ideal for AI-driven applications. With a dedicated memory of 1 GB DRAM, it enhances the capabilities of vision processing systems, providing significant boosts in performance for devices with Next Generation Form Factor (NGFF) M.2 sockets. Ideal for use in computer vision systems and more, it offers hassle-free integration and evaluation with Axelera's Voyager SDK. This accelerator module is tailored for any application seeking to harness the power of AI processing efficiently. The Metis AIPU M.2 Module streamlines the deployment of AI applications, ensuring high performance with reduced power consumption.
The A25 processor model is a versatile CPU suitable for a variety of embedded applications. With its 5-stage pipeline and 32/64-bit architecture, it delivers high performance even with a low gate count, which translates to efficiency in power-sensitive environments. The A25 is equipped with Andes Custom Extensions that enable tailored instruction sets for specific application accelerations. Supporting robust high-frequency operations, this model shines in its ability to manage data prefetching and cache coherence in multicore setups, making it adept at handling complex processing tasks within constrained spaces.
The RV12 RISC-V Processor is a highly configurable, single-core CPU that adheres to RV32I and RV64I standards. It’s engineered for the embedded market, offering a robust structure based on the RISC-V instruction set. The processor's architecture allows simultaneous instruction and data memory accesses, lending itself to a broad range of applications and maintaining high operational efficiency. This flexibility makes it an ideal choice for diverse execution requirements, supporting efficient data processing through an optimized CPU framework. Known for its adaptability, the RV12 processor can support multiple configurations to suit various application demands. It is capable of providing the necessary processing power for embedded systems, boasting a reputation for stability and reliability. This processor becomes integral for designs that require a maintainability of performance without compromising on the configurability aspect, meeting the rigorous needs of modern embedded computing. The processor's support of the open RISC-V architecture ensures its capability to integrate into existing systems seamlessly. It lends itself well to both industrial and academic applications, offering a resource-efficient platform that developers and researchers can easily access and utilize.
RaiderChip's GenAI v1 is a pioneering hardware-based generative AI accelerator, designed to perform local inference at the Edge. This technology integrates optimally with on-premises servers and embedded devices, offering substantial benefits in privacy, performance, and energy efficiency over traditional hybrid AI solutions. The design of the GenAI v1 NPU streamlines the process of executing large language models by embedding them directly onto the hardware, eliminating the need for external components like CPUs or internet connections. With its ability to support complex models such as the Llama 3.2 with 4-bit quantization on LPDDR4 memory, the GenAI v1 achieves unprecedented efficiency in AI token processing, coupled with energy savings and reduced latency. What sets GenAI v1 apart is its scalability and cost-effectiveness, significantly outperforming competitive solutions such as Intel Gaudi 2, Nvidia's cloud GPUs, and Google's cloud TPUs in terms of memory efficiency. This solution maximizes the number of tokens generated per unit of memory bandwidth, thus addressing one of the primary limitations in generative AI workflow. Furthermore, the adept memory usage of GenAI v1 reduces the dependency on costly memory types like HBM, opening the door to more affordable alternatives without diminishing processing capabilities. With a target-agnostic approach, RaiderChip ensures the GenAI v1 can be adapted to various FPGAs and ASICs, offering configuration flexibility that allows users to balance performance with hardware costs. Its compatibility with a wide range of transformers-based models, including proprietary modifications, ensures GenAI v1's robust placement across sectors requiring high-speed processing, like finance, medical diagnostics, and autonomous systems. RaiderChip's innovation with GenAI v1 focuses on supporting both vanilla and quantized AI models, ensuring high computation speeds necessary for real-time applications without compromising accuracy. This capability underpins their strategic vision of enabling versatile and sustainable AI solutions across industries. By prioritizing integration ease and operational independence, RaiderChip provides a tangible edge in applying generative AI effectively and widely.
The Speedster7t FPGA family is crafted for high-bandwidth tasks, tackling the usual restrictions seen in conventional FPGAs. Manufactured using the TSMC 7nm FinFET process, these FPGAs are equipped with a pioneering 2D network-on-chip architecture and a series of machine learning processors for optimal high-bandwidth performance and AI/ML workloads. They integrate interfaces for high-paced GDDR6 memory, 400G Ethernet, and PCI Express Gen5 ports. This 2D network-on-chip connects various interfaces to upward of 80 access points in the FPGA fabric, enabling ASIC-like performance, yet retaining complete programmability. The product encourages users to start with the VectorPath accelerator card which houses the Speedster7t FPGA. This family offers robust tools for applications such as 5G infrastructure, computational storage, and test and measurement.
The GenAI v1-Q from RaiderChip brings forth a specialized focus on quantized AI operations, reducing memory requirements significantly while maintaining impressive precision and speed. This innovative accelerator is engineered to execute large language models in real-time, utilizing advanced quantization techniques such as Q4_K and Q5_K, thereby enhancing AI inference efficiency especially in memory-constrained environments. By offering a 276% boost in processing speed alongside a 75% reduction in memory footprint, GenAI v1-Q empowers developers to integrate advanced AI capabilities into smaller, less powerful devices without sacrificing operational quality. This makes it particularly advantageous for applications demanding swift response times and low latency, including real-time translation, autonomous navigation, and responsive customer interactions. The GenAI v1-Q diverges from conventional AI solutions by functioning independently, free from external network or cloud auxiliaries. Its design harmonizes superior computational performance with scalability, allowing seamless adaptation across variegated hardware platforms including FPGAs and ASIC implementations. This flexibility is crucial for tailoring performance parameters like model scale, inference velocity, and power consumption to meet exacting user specifications effectively. RaiderChip's GenAI v1-Q addresses crucial AI industry needs with its ability to manage multiple transformer-based models and confidential data securely on-premises. This opens doors for its application in sensitive areas such as defense, healthcare, and financial services, where confidentiality and rapid processing are paramount. With GenAI v1-Q, RaiderChip underscores its commitment to advancing AI solutions that are both environmentally sustainable and economically viable.
Micro Magic's Ultra-Low-Power 64-Bit RISC-V Core is engineered for superior energy efficiency, consuming a mere 10mW while operating at a clock speed of 1GHz. This processor core is designed to excel under low voltage conditions, delivering high performance without compromising on power conservation. It is ideal for applications requiring prolonged battery life or those operating in energy-sensitive environments. This processor integrates Micro Magic's advanced design methodologies, allowing for operation at frequencies up to 5GHz when necessary. The RISC-V Core capabilities are enhanced by solid construction, ensuring reliability and robust performance across various use-cases, making it an adaptable solution for modern electronic designs. With its cutting-edge design, this RISC-V core supports rapid deployment in numerous applications, especially in areas demanding high computational power alongside reduced energy usage. Micro Magic's advanced techniques ensure that this core is not only fast but also supports scalable integration into various systems with ease.
The AX45MP is engineered as a high-performance processor that supports multicore architecture and advanced data processing capabilities, particularly suitable for applications requiring extensive computational efficiency. Powered by the AndesCore processor line, it capitalizes on a multicore symmetric multiprocessing framework, integrating up to eight cores with robust L2 cache management. The AX45MP incorporates advanced features such as vector processing capabilities and support for MemBoost technology to maximize data throughput. It caters to high-demand applications including machine learning, digital signal processing, and complex algorithmic computations, ensuring data coherence and efficient power usage.
The RISC-V Core-hub Generators from InCore are tailored for developers who need advanced control over their core architectures. This innovative tool enables users to configure core-hubs precisely at the instruction set and microarchitecture levels, allowing for optimized design and functionality. The platform supports diverse industry applications by facilitating the seamless creation of scalable and customizable RISC-V cores. With the RISC-V Core-hub Generators, InCore empowers users to craft their own processor solutions from the ground up. This flexibility is pivotal for businesses looking to capitalize on the burgeoning RISC-V ecosystem, providing a pathway to innovation with reduced risk and cost. Incorporating feedback from leading industry partners, these generators are designed to lower verification costs while accelerating time-to-market for new designs. Users benefit from InCore's robust support infrastructure and a commitment to simplifying complex chip design processes. This product is particularly beneficial for organizations aiming to integrate RISC-V technology efficiently into their existing systems, ensuring compatibility and enhancing functionality through intelligent automation and state-of-the-art tools.
AndesCore Processors offer a robust lineup of high-performance CPUs tailored for diverse market segments. Employing the AndeStar V5 instruction set architecture, these cores uniformly support the RISC-V technology. The processor family is classified into different series, including the Compact, 25-Series, 27-Series, 40-Series, and 60-Series, each featuring unique architectural advances. For instance, the Compact Series specializes in delivering compact, power-efficient processing, while the 60-Series is optimized for high-performance out-of-order execution. Additionally, AndesCore processors extend customization through Andes Custom Extension, which allows users to define specific instructions to accelerate application-specific tasks, offering a significant edge in design flexibility and processing efficiency.
Crafted to deliver significant power savings, the Tianqiao-70 is a low-power RISC-V CPU that excels in commercial-grade scenarios. This 64-bit CPU core is primarily designed for applications where power efficiency is critical, such as mobile devices and computationally intensive IoT solutions. The core's architecture is specifically optimized to perform under stringent power budgets without compromising on the processing power needed for complex tasks. It provides an efficient solution for scenarios that demand reliable performance while maintaining a low energy footprint. Through its refined design, the Tianqiao-70 supports a broad spectrum of applications, including personal computing, machine learning, and mobile communications. Its versatility and power-awareness make it a preferred choice for developers focused on sustainable and scalable computing architectures.
The Azurite Core-hub by InCore Semiconductors is a sophisticated solution designed to offer scalable RISC-V SoCs with high-speed secure interconnect capabilities. This processor is tailored for performance-demanding applications, ensuring that systems maintain robust security while executing tasks at high speeds. Azurite leverages advanced interconnect technologies to enhance the communication between components within a SoC, making it ideal for industries that require rapid data transfer and high processing capabilities. The core is engineered to be scalable, supporting a wide range of applications from edge AI to functional safety systems, adapting seamlessly to various industry needs. Engineered with a focus on security, the Azurite Core-hub incorporates features that protect data integrity and system operation in a dynamic technological landscape. This makes it a reliable choice for companies seeking to integrate advanced RISC-V architectures into their security-focused applications, offering not just innovation but also peace of mind with its secure design.
The N Class RISC-V CPU IP from Nuclei is tailored for applications where space efficiency and power conservation are paramount. It features a 32-bit architecture and is highly suited for microcontroller applications within the AIoT realm. The N Class processors are crafted to provide robust processing capabilities while maintaining a minimal footprint, making them ideal candidates for devices that require efficient power management and secure operations. By adhering to the open RISC-V standard, Nuclei ensures that these processors can be seamlessly integrated into various solutions, offering customizable options to fit specific system requirements.
The **Ceva-SensPro DSP family** unites scalar processing units and vector processing units under an 8-way VLIW architecture. The family incorporates advanced control features such as a branch target buffer and a loop buffer to speed up execution and reduce power. There are six family members, each with a different array of MACs, targeted at different application areas and performance points. These range from the Ceva-SP100, providing 128 8-bit integer or 32 16-bit integer MACs at 0.2 TOPS performance for compact applications such as vision processing in wearables and mobile devices; to the Ceva-SP1000, with 1024 8-bit or 256 16-bit MACs reaching 2 TOPS for demanding applications such as automotive, robotics, and surveillance. Two of the family members, the Ceva-SPF2 and Ceva-SPF4, employ 32 or 64 32-bit floating-point MACs, respectively, for applications in electric-vehicle power-train control and battery management. These two members are supported by libraries for Eigen Linear Algebra, MATLAB vector operations, and the TVM graph compiler. Highly configurable, the vector processing units in all family members can add domain-specific instructions for such areas as vision processing, Radar, or simultaneous localization and mapping (SLAM) for robotics. Integer family members can also add optional floating-point capabilities. All family members have independent instruction and data memory subsystems and a Ceva-Connect queue manager for AXI-attached accelerators or coprocessors. The Ceva-SensPro2 family is programmable in C/C++ as well as in Halide and Open MP, and supported by an Eclipse-based development environment, extensive libraries spanning a wide range of applications, and the Ceva-NeuPro Studio AI development environment. [**Learn more about Ceva-SensPro2 solution>**](https://www.ceva-ip.com/product/ceva-senspro2/?utm_source=silicon_hub&utm_medium=ip_listing&utm_campaign=ceva_senspro2_page)
RAIV represents Siliconarts' General Purpose-GPU (GPGPU) offering, engineered to accelerate data processing across diverse industries. This versatile GPU IP is essential in sectors engaged in high-performance computing tasks, such as autonomous driving, IoT, and sophisticated data centers. With RAIV, Siliconarts taps into the potential of the fourth industrial revolution, enabling rapid computation and seamless data management. The RAIV architecture is poised to deliver unmatched efficiency in high-demand scenarios, supporting massive parallel processing and intricate calculations. It provides an adaptable framework that caters to the needs of modern computing, ensuring balanced workloads and optimized performance. Whether used for VR/AR applications or supporting the back-end infrastructure of data-intensive operations, RAIV is designed to meet and exceed industry expectations. RAIV’s flexible design can be tailored to enhance a broad spectrum of applications, promising accelerated innovation in sectors dependent on AI and machine learning. This GPGPU IP not only underscores Siliconarts' commitment to technological advancement but also highlights its capability to craft solutions that drive forward computational boundaries.
Syntacore's SCR3 microcontroller core is a versatile option for developers looking to harness the power of a 5-stage in-order pipeline. Designed to support both 32-bit and 64-bit symmetric multiprocessing (SMP) configurations, this core is perfectly aligned with the needs of embedded applications requiring moderate power and resource efficiency coupled with enhanced processing capabilities. The architecture is fine-tuned to handle a variety of workloads, ensuring a balance between performance and power usage, making it suitable for sectors such as industrial automation, automotive sensors, and IoT devices. The inclusion of privilege modes, memory protection units (MPUs), and cache systems further enhances its capabilities, particularly in environments where system security and reliability are paramount. Developers will find the SCR3 core to be highly adaptable, fitting seamlessly into designs that need scalability and modularity. Syntacore's comprehensive toolkit, combined with detailed documentation, ensures that system integration is both quick and reliable, providing a robust foundation for varied applications.
The Codasip RISC-V BK Core Series is designed to offer flexible and high-performance core options catering to a wide range of applications, from low-power tasks to intricate computational needs. This series achieves optimal balance in power consumption and processing speed, making it suitable for applications demanding energy efficiency without compromising performance. These cores are fully RISC-V compliant, allowing for easy customizations to suit specific needs by modifying the processor's architecture or instruction set through Codasip Studio. The BK Core Series provides a streamlining process for developing precise computing solutions, ideal for IoT edge devices and sensor controllers where both small area and low power are critical. Moreover, the BK Core Series supports architectural exploration, enabling users to optimize the core design specifically tailored to their applications. This capability ensures that each core delivers the expected power, efficiency, and performance metrics required by modern technological solutions.
The General Purpose Accelerator (Aptos) from Ascenium stands out as a redefining force in the realm of CPU technology. It seeks to overcome the limitations of traditional CPUs by providing a solution that tackles both performance inefficiencies and high energy demands. Leveraging compiler-driven architecture, this accelerator introduces a novel approach by simplifying CPU operations, making it exceptionally suited for handling generic code. Notably, it offers compatibility with the LLVM compiler, ensuring a wide range of applications can be adapted seamlessly without rewrites. The Aptos excels in performance by embracing a highly parallel yet simplified CPU framework that significantly boosts efficiency, reportedly achieving up to four times the performance of cutting-edge CPUs. Such advancements cater not only to performance-oriented tasks but also substantially mitigate energy consumption, providing a dual benefit of cost efficiency and reduced environmental impact. This makes Aptos a valuable asset for data centers seeking to optimize their energy footprint while enhancing computational capabilities. Additionally, the Aptos architecture supports efficient code execution by resolving tasks predominantly at compile-time, allowing the processor to handle workloads more effectively. This allows standard high-level language software to run with improved efficiency across diverse computing environments, aligning with an overarching goal of greener computing. By maximizing operational efficiency and reducing carbon emissions, Aptos propels Ascenium into a leading position in the sustainable and high-performance computing sector.
The eSi-1650 is a compact, low-power 16-bit CPU core integrating an instruction cache, making it an ideal choice for mature process nodes reliant on OTP or Flash program memory. By omitting large on-chip RAMs, the IP core optimizes power and area efficiency and permits the CPU to capitalize on its maximum operational frequency beyond OTP/Flash constraints.
The RISC-V Core IP developed by AheadComputing Inc. stands out in the field of 64-bit application processors. Designed to deliver exceptional per-core performance, this processor is engineered with the highest standards to maximize the Instructions Per Cycle (IPC) efficiency. AheadComputing's RISC-V Core IP is continuously refined to address the growing demands of high-performance computing applications. The innovative architecture of this core allows for seamless execution of complex algorithms while achieving superior speed and efficiency. This design is crucial for applications that require fast data processing and real-time computational capabilities. By integrating advanced power management techniques, the RISC-V Core IP ensures energy efficiency without sacrificing performance, making it suitable for a wide range of electronic devices. Anticipating future computing needs, AheadComputing's RISC-V Core IP incorporates state-of-the-art features that support scalability and adaptability. These features ensure that the IP remains relevant as technology evolves, providing a solid foundation for developing next-generation computing solutions. Overall, it embodies AheadComputing’s commitment to innovation and performance excellence.
The Maverick-2 Intelligent Compute Accelerator (ICA) by Next Silicon represents a transformative leap in high-performance compute architecture. It seamlessly integrates into HPC systems with a pioneering software-defined approach that dynamically optimizes hardware configurations based on real-time application demands. This enables high efficiency and unparalleled performance across diverse workloads including HPC, AI, and other data-intensive applications. Maverick-2 harnesses a 5nm process technology, utilizing HBM3E memory for enhanced data throughput and efficient energy usage.\n\nBuilt with developers in mind, Maverick-2 supports an array of programming languages such as C/C++, FORTRAN, and OpenMP without the necessity for proprietary stacks. This flexibility not only mitigates porting challenges but significantly reduces development time and costs. A distinguishing feature of Maverick-2 is its real-time telemetry capabilities that provide valuable insights into performance metrics, allowing for refined optimizations during execution.\n\nThe architecture supports versatile interfaces such as PCIe Gen 5 and offers configurations that accommodate complex workloads using either single or dual-die setups. Its intelligent algorithms autonomously identify computational bottlenecks to enhance throughput and scalability, thus future-proofing investments as computing demands evolve. Maverick-2's utility spans various sectors including life sciences, energy, and fintech, underlining its adaptability and high-performance capabilities.
Designed for exceptional performance in demanding environments, the SCR6 microcontroller core integrates advanced processing capabilities with power efficiency. Featuring a 12-stage, dual-issue out-of-order pipeline and a high-performance floating-point unit (FPU), it excels in managing computationally intensive tasks with finesse and speed, making it a prime candidate for next-gen microcontroller applications. With a focus on high bandwidth and efficient throughput, the SCR6 supports scalable deployments thanks to its symmetrical multiprocessing (SMP) configurations. This design enables usage in sectors where swift processing and reliability are crucial, such as real-time industrial automation, automotive systems, and IoT platforms. Syntacore’s SCR6 benefits from a well-rounded development environment, offering support that ensures high compatibility with a variety of platforms and applications. The core exemplifies Syntacore's commitment to providing innovative solutions that embody both the potential and flexibility of the RISC-V architecture.
The eSi-1600 is a 16-bit CPU core designed for cost-sensitive and power-efficient applications. It accords performance levels similar to that of 32-bit CPUs while maintaining a system cost comparable to 8-bit processors. This IP is particularly well-suited for control applications needing limited memory resources, demonstrating excellent compatibility with mature mixed-signal technologies.
The eSi-3200, a 32-bit cacheless core, is tailored for embedded control with its expansive and configurable instruction set. Its capabilities, such as 64-bit multiply-accumulate operations and fixed-point complex multiplications, cater effectively to signal processing tasks like FFTs and FIRs. Additionally, it supports SIMD and single-precision floating point operations, coupled with efficient power management features, enhancing its utility for diverse embedded applications.
The SCR1 microcontroller core from Syntacore is an open-source, compact core tailored for deeply embedded applications. It features a straightforward 4-stage in-order pipeline, making it ideally suited for smaller, power-constrained devices where performance needs to be finely balanced with energy consumption. This core is particularly valuable in applications requiring a high degree of customization and flexibility. With a unique combination of low area footprint and efficiency, the SCR1 is a pivotal tool for developers involved in creating optimized, scalable systems, particularly in the fields of sensory data processing, IoT, and control systems. Its design architecture ensures that it can efficiently handle the demands of modern consumer electronics and other compact embedded devices. The SCR1 supports a rich ecosystem of development tools provided by Syntacore, ensuring that integration into various platforms is seamless. Syntacore's commitment to open-source development allows for a wide adoption of their core among a diverse range of projects and initiatives, enhancing the potential of the RISC-V architecture in global markets.
EverOn is an ultra-low voltage SRAM developed by sureCore to cater to modern applications requiring extensive dynamic and static power savings. Built on the 40ULP BULK CMOS process, EverOn achieves up to 80% reductions in dynamic power utilization while cutting static power draw by 75%, making it highly efficient for IoT and wearable technology. Operational from 0.6V to 1.21V, EverOn supports a cycle time as short as 20MHz at its lowest voltage, scaling impressively to over 300MHz at its highest. This voltage scaling unlocks robust performance capabilities in energy-constrained environments, aligning with the trend towards increasingly sophisticated, low-power always-on devices. EverOn incorporates advanced techniques such as subdividing memory into banks for flexible power management and synchronized single-port operation, which enhances versatility. Its high-density bit cells facilitate reduced area footprints while the patented SMART-Assist technology ensures robust operation even at the retention voltage, supporting extended battery life applications in emerging markets.
Syntacore’s SCR9 processor core stands out as a powerful force in handling high-performance computing tasks with its dual-issue out-of-order 12-stage pipeline. This core is engineered for environments that demand peak computational ability and robust pipeline execution, crucial for data-intense tasks such as AI and ML, enterprise applications, and network processing. The architecture is tailored to support extensive multicore and heterogeneous configurations, providing valuable tools for developers aiming to maximize workload efficiency and processing speed. The inclusion of a vector processing unit (VPU) underscores its capability to handle large datasets and complex calculations, while maintaining system integrity and coherence through its comprehensive cache management. With support for hypervisor functionalities and scalable Linux environments, the SCR9 continues to be a key strategic element in expanding the horizons of RISC-V-based applications. Syntacore’s extensive library of development resources further enriches the usability of this core, ensuring that its implementation remains smooth and effective across diverse technological landscapes.
The Y180 is a microprocessor that serves as a precise clone of the Zilog Z180 CPU, encapsulating approximately 8,000 gates. This processor provides the familiar functionalities and efficiencies of the Z180 architecture while enhancing performance through Systemyde's design optimizations. A critical feature of the Y180 is its ability to seamlessly integrate within systems requiring the well-established Z180 instruction set. This compatibility enables the Y180 to be a direct replacement or enhancement in existing infrastructure, providing a straightforward upgrade path with minimal impact on design integration. Systemyde backs the Y180 with a comprehensive set of design and testing tools, ensuring that each implementation meets stringent operational standards. Its efficient architecture and silicon-proven reliability make it an ideal choice for applications that benefit from the Z180 design philosophy while leveraging modern advancements in processing capabilities.
The SCR7 application core is at the forefront of performance and innovation, featuring a 12-stage dual-issue out-of-order pipeline with capabilities that support high-performance, Linux-capable application environments. This core is essential for scenarios demanding seamless cache coherency and support for complex operational tasks. Ideal for high-demand markets such as data centers, artificial intelligence, and mobile technologies, the SCR7 provides a robust and efficient solution that thrives under demanding conditions. It supports 64-bit SMP configurations up to 8 cores, effectively handling multi-threaded operations with superior data throughput capabilities. Syntacore enhances this core’s functionality through its comprehensive ecosystem of tools and support resources, ensuring developers can maximize the capabilities of this formidable hardware. The SCR7 stands as a testament to the scalability and adaptability intrinsic to the RISC-V architecture, reinforced by Syntacore's innovative approach to processor IP design.
The Nuclei N300 Series Processor Core is a commercial RISC-V Processor Core Series designed by Nuclei System Technology for microcontroller, IoT, or other low-power applications. The N300 Series offers advanced features such as dual-issue capability, configurable instruction sets including ISA extensions, low-power management modes, and comprehensive debug support. It also includes support for ECC, TEE, and scalable local memory interfaces. Enhanced features like ETRACE and customizable instructions via the NICE interface further extend its capabilities.
The Veyron V1 is a high-performance RISC-V CPU designed to meet the rigorous demands of modern data centers and compute-intensive applications. This processor is tailored for cloud environments requiring extensive compute capabilities, offering substantial power efficiency while optimizing processing workloads. It provides comprehensive architectural support for virtualization and efficient task management with its robust feature set. Incorporating advanced RISC-V standards, the Veyron V1 ensures compatibility and scalability across a wide range of industries, from enterprise servers to high-performance embedded systems. Its architecture is engineered to offer seamless integration, providing an excellent foundation for robust, scalable computing designs. Equipped with state-of-the-art processing cores and enhanced vector acceleration, the Veyron V1 delivers unmatched throughput and performance management, making it suitable for use in diverse computing environments.
Specially engineered for the automotive industry, the NA Class IP by Nuclei complies with the stringent ISO26262 functional safety standards. This processor is crafted to handle complex automotive applications, offering flexibility and rigorous safety protocols necessary for mission-critical transportation technologies. Incorporating a range of functional safety features, the NA Class IP is equipped to ensure not only performance but also reliability and safety in high-stakes vehicular environments.
The NaviSoC is a versatile system-on-chip that revolutionizes GNSS applications by combining a high-performance receiver with an application processor. Designed for precision-demanding tasks, NaviSoC provides centimeter-level accuracy, making it ideal for applications such as autonomous drones and smart agriculture. It boasts a high update rate and low power consumption, crucial for real-time tracking and energy-efficient operations. This system-on-chip is enhanced with a RISC-V MCU, expanding its capabilities for various applications in asset tracking and industrial navigation. Its flexibility is evident in its support for all-constellation, all-band GNSS signals, providing global coverage and reliability. With fast time-to-first-fix capabilities and integration features such as dead reckoning and RTK, NaviSoC can handle challenging environments, ensuring consistent performance. NaviSoC's architecture integrates numerous peripherals and interfaces, optimized for seamless connectivity and extended functionality. Whether for UAV operations or time synchronization, the NaviSoC is equipped to address the most demanding requirements of today's connected world. Its adaptability is epitomized by its support for embedded flash and a dedicated software development kit (SDK), allowing for customization and rapid deployment in bespoke applications. This GNSS solution is also supported by a suite of development tools and evaluation boards, ensuring that developers can efficiently bring applications from concept to reality. As a flagship product of ChipCraft, NaviSoC underlines the company's commitment to delivering state-of-the-art semiconductor solutions.
Tachyum's Prodigy Universal Processor marks a significant milestone as it combines the functionalities of Central Processing Units (CPUs), General-Purpose Graphics Processing Units (GPGPUs), and Tensor Processing Units (TPUs) into a single cohesive architecture. This groundbreaking design is tailored to meet the escalating demands of artificial intelligence, high-performance computing, and hyperscale data centers by offering unparalleled performance, energy efficiency, and high utilization rates. The Prodigy processor not only tackles common data center challenges like elevated power consumption and stagnating processor performance but also offers a robust solution to enhance server utilization and reduce the carbon footprint of massive computational installations. Notably, it thrives on a simplified programming model grounded in coherent multiprocessor architecture, thereby enabling seamless execution of an array of AI disciplines like Explainable AI, Bio AI, and deep machine learning within a single hardware platform.
The RISC-V Processor Core developed by Fraunhofer IPMS is a versatile processor designed for the flexible demands of modern digital systems. It adheres to the open RISC-V architecture, ensuring a customizable and extendable computing platform. This processor core is ideal for applications requiring low-power consumption without sacrificing processing power, making it suitable for IoT devices and embedded systems. Built with a focus on energy efficiency and speed, the RISC-V core is capable of executing complex operations at rapid speeds, making it a reliable choice for time-sensitive tasks and high-performance computations. It supports a wide range of data processing capabilities, delivering optimized performance for various applications, from consumer electronics to advanced automotive systems. With its open-source foundation, this processor core allows for extensive customization, fostering innovation and adaptability in design processes. By supporting seamless integration into various system architectures, the RISC-V core ensures compatibility and scalability, crucial for modern technological advancements.
The SiFive Essential family provides a comprehensive range of embedded processor cores that can be tailored to various application needs. This series incorporates silicon-proven, pre-defined CPU cores with a focus on scalability and configurability, ranging from simple 32-bit MCUs to advanced 64-bit processors capable of running embedded RTOS and full-fledged operating systems like Linux. SiFive Essential empowers users with the flexibility to customize the design for specific performance, power, and area requirements. The Essential family introduces significant advancements in processing capabilities, allowing users to design processors that meet precise application needs. It features a rich set of options for interface customizations, providing seamless integration into broader SoC designs. Moreover, the family supports an 8-stage pipeline architecture and, in some configurations, offers dual-issue superscalar capabilities for enhanced processing throughput. For applications where security and traceability are crucial, the Essential family includes WorldGuard technology, which ensures comprehensive protection across the entire SoC, safeguarding against unauthorized access. The flexible design opens up various use cases, from IoT devices and microcontrollers to real-time control applications and beyond.
The SiFive Performance family is dedicated to offering high-throughput, low-power processor solutions, suitable for a wide array of applications from data centers to consumer devices. This family includes a range of 64-bit, out-of-order cores configured with options for vector computations, making it ideal for tasks that demand significant processing power alongside efficiency. Performance cores provide unmatched energy efficiency while accommodating a breadth of workload requirements. Their architecture supports up to six-wide out-of-order processing with tailored options that include multiple vector engines. These cores are designed for flexibility, enabling various implementations in consumer electronics, network storage solutions, and complex multimedia processing. The SiFive Performance family facilitates a mix of high performance and low power usage, allowing users to balance the computational needs with power consumption effectively. It stands as a testament to SiFive’s dedication to enabling flexible tech solutions by offering rigorous processing capabilities in compact, scalable packages.
The NS Class is Nuclei's crucial offering for applications prioritizing security and fintech solutions. This RISC-V CPU IP securely manages IoT environments with its highly customizable and secure architecture. Equipped to support advanced security protocols and functional safety features, the NS Class is particularly suited for payment systems and other fintech applications, ensuring robust protection and reliable operations. Its design follows the RISC-V standards and is accompanied by customizable configuration options tailored to meet specific security requirements.
The NX Class RISC-V CPU IP by Nuclei is characterized by its 64-bit architecture, making it a robust choice for storage, AR/VR, and AI applications. This processing unit is designed to accommodate high data throughput and demanding computational tasks. By leveraging advanced capabilities, such as virtual memory and enhanced processing power, the NX Class facilitates cutting-edge technological applications and is adaptable for integration into a vast array of high-performance systems.
Engineered for a dynamic performance footprint, the SCR4 microcontroller core offers a significant advantage with its 5-stage in-order pipeline and specialized floating-point unit (FPU). This characteristic makes it ideal for applications demanding precise computational accuracy and speed, such as control systems, network devices, and automotive technologies. Leveraging 32/64-bit capability, the SCR4 core supports symmetric multiprocessing (SMP) with the added benefit of privilege modes and a comprehensive memory architecture, which includes both L1 and L2 caches. These features make it particularly attractive for developers seeking a core that enables high data throughput while maintaining a focus on power efficiency and area optimization. Syntacore has positioned the SCR4 as a go-to core for projects requiring both power and precision, supported by a development environment that is both intuitive and comprehensive. Its applicability across various industrial sectors underscores its versatility and the robustness of the RISC-V architecture that underpins it.
The Rabbit 3000 processor stands out with its increased gate count of approximately 31,000, paired with a 128-pin architecture. Building on the foundation laid by the Rabbit 2000, this processor offers a balance between performance and functionality, catering to more complex design requirements. As part of Systemyde's robust lineup of synthesizable IP, the Rabbit 3000 is designed to bridge the gap between simplicity and enhanced feature sets. One of the key attributes of the Rabbit 3000 is its adaptability to various implementations, whether in FPGA or ASIC technologies. Its increased capabilities are ideal for applications requiring additional computational power or advanced interfacing options. The processor achieves a refined balance in design, ensuring swift processing, which is critical for performance-sensitive tasks. The Rabbit 3000 processor benefits from a comprehensive design package, including a synthesizable model, test benches, and an exhaustive test suite. This thorough approach to design verification ensures reliability and performance across diverse application landscapes, making it a valuable asset in Systemyde’s diverse microprocessor portfolio.
The eSi-3264 stands out with its support for both 32/64-bit operations, including 64-bit fixed and floating-point SIMD (Single Instruction Multiple Data) DSP extensions. Engineered for applications mandating DSP functionality, it does so with minimal silicon footprint. Its comprehensive instruction set includes specialized commands for various tasks, bolstering its practicality across multiple sectors.
The Y51 processor is designed around the classic 8051 Instruction Set Architecture, delivering enhanced performance with a 2-clock machine cycle. This processor marks a significant improvement over conventional implementations, aligning with modern processing needs while maintaining compatibility with 8051 infrastructures. The compact design of the Y51 ensures that it can be integrated into a wide range of applications, particularly where efficiency and speed are priorities. Its architecture allows for rapid data processing, making it a suitable candidate for systems that demand high-speed operations combined with the functional reliability of well-understood designs. Systemyde provides a comprehensive design and testing package for the Y51, which allows for seamless deployment across various platforms. The processor's ability to deliver consistent performance underpins its role in electronics that demand responsive and reliable processing power.
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