In a significant move that reflects the growing convergence of AI and semiconductor design, Keysight Technologies and Synopsys have announced a collaborative, AI-enabled RF design migration flow, targeting TSMC's N4P process node. This solution is designed to accelerate the transition from legacy RF designs at 6nm (N6RF+) to the more advanced and efficient N4P node—without the costly manual rework traditionally required.

🧠 The Problem: Migrating RF Designs Is Hard

RF and analog circuits are notoriously difficult to port across nodes. Unlike digital logic, analog components do not scale linearly. Every process migration involves meticulous layout re-optimization, simulation validation, parasitic extraction, and retuning of passive components. The cost in engineering hours and the risk of design failure are high.

As demand for advanced wireless systems—such as 5G, 6G, Wi-Fi 7, and mmWave radar—pushes the boundaries of RF performance, semiconductor teams need faster, more accurate ways to bring proven designs to cutting-edge nodes.

🤝 The Collaboration: Keysight + Synopsys + TSMC

This new solution leverages best-in-class technologies from all three companies:

1. Synopsys Custom Compiler + ASO.ai

ASO.ai (Analog System Optimization AI) uses machine learning to guide circuit and layout migration with predictive accuracy, minimizing manual tuning. This is layered into the Synopsys Custom Compiler environment for streamlined usability.

2. PrimeSim

Synopsys’ simulation suite validates performance across process, voltage, and temperature (PVT) corners, ensuring the migrated design is robust.

3. Keysight RFPro

Keysight contributes electromagnetic (EM) simulation and passive-device modeling. RFPro supports rapid re-characterization of critical components like inductors, capacitors, and transmission lines—which often need redesign when moving to a new process.

4. TSMC’s N4P Process Technology

N4P is a performance-enhanced version of the 5nm family, offering improved speed and power efficiency over N6RF+. This migration unlocks access to higher performance-per-watt while aligning with TSMC’s most advanced nodes in volume production.

⚙️ The Migration Flow in Action

Using a test case—such as a low-noise amplifier (LNA)—the new flow:

1. Automates schematic translation and layout adjustments
2. Applies AI-driven optimizations for key design parameters
3. Runs EM simulations and layout-versus-schematic (LVS) checks
4. Validates silicon performance with PrimeSim
5. Outputs a manufacturable N4P-ready design with significantly reduced manual effort

🚀 Why It Matters

1. Time Savings: RF migration time is cut dramatically, from weeks to days.
2. Design Reuse: Proven IP can be migrated with minimal re-qualification.
3. Performance Gains: N4P enables better PPA (Power-Performance-Area) metrics for RF chips.
4. AI EDA Maturity: This proves AI’s role is not just theoretical—it's actionable in real workflows.

📍 The Broader Implications

This announcement is a major signal that EDA automation is moving beyond digital. The analog and RF domains have long been resistant to automation due to their complexity and nuance. But with this collaboration, a practical and production-ready toolchain has emerged, demonstrating the viability of AI in traditionally manual parts of the semiconductor design process.

The implications are clear:

1. Companies can accelerate product development in high-frequency wireless markets.
2. Foundries can promote faster adoption of their latest nodes.
3. AI can reduce the analog bottleneck in chip design cycles.

💡 Final Thoughts

Keysight, Synopsys, and TSMC are not just pushing tools—they're reshaping how analog/RF design is done. As chip complexity continues to grow, this kind of collaborative, AI-powered flow could become the new standard.

We’re witnessing a shift: from handcrafted analog to AI-assisted automation. And in the race to deliver faster, more efficient wireless silicon, that shift might just define the next wave of semiconductor innovation.