Chip Talk > Breaking New Ground with Sofics' 2nm Pioneering Tech
Published June 25, 2025
In the rapidly evolving semiconductor industry, innovations that push the boundaries of technology are the cornerstone of the sector's progression. Sofics, a renowned entity in physical layout and design, has achieved a landmark by validating its IP on TSMC's cutting-edge 2nm technology. This advance heralds a new era for semiconductor technologies, especially in domains like artificial intelligence (AI), high-performance computing (HPC), and data centers.
Power, performance, and area (PPA) are critical metrics in semiconductor design, and Sofics has demonstrated substantial improvements in these areas with their latest offerings. The robustness validated for interfaces operating at various voltages (0.75V to 1.8V) speaks volumes about the efficiency and reliability of Sofics’s design capabilities.
The strategic focus on low parasitic capacitance for electrostatic discharge (ESD) devices is particularly noteworthy. This feature is crucial for maintaining high speed, bandwidth, and frequency needed for modern applications. Furthermore, with the inclusion of general-purpose input/output (GPIO) circuitry optimized for power gains and area savings, Sofics not only meets but exceeds industry benchmarks.
Sofics’ collaboration with TSMC is nothing short of remarkable. The two companies have had a fruitful partnership, working together for over 15 years under the TSMC Open Innovation Platform® (OIP). This collaboration ensures that the latest IP solutions meet the rigorous demands of modern semiconductor applications.
Koen Verhaege, CEO of Sofics, highlighted the company's dedication to early 2nm IP deployment, which already sees adoption by more than 90 customers across various TSMC process technologies. Their strategy involves engaging with top semiconductor companies to not only align with market expectations but to shape them.
This development is pivotal for advanced SoC and chiplet designs, a foundation for emerging technologies in AI, HPC, and data center realms. The GPIO circuits' compatibility with legacy chips is a crucial element, ensuring seamless technology integration.
The customizability tailored for low-power, high-performance applications is a competitive advantage that many semiconductor companies can leverage. As Lluis Paris from TSMC North America articulated, these technologies provide not just performance increases but also significant power-efficiency benefits.
The 2nm IP solutions are available for immediate licensing, which is crucial for fabless designers looking to accelerate time-to-market, reduce design risk, and cut costs. With pre-verified, high-performance IP accessible, designers can capitalize on the technology without the exhaustive development from scratch, focusing resources instead on product innovation.
Sofics's latest progress with TSMC’s 2nm technology is a testament to the cutting-edge innovations shaping our tech-driven world. As industry experts, staying abreast of these developments not only prepares us for future changes but also empowers us to be key players in driving these advancements forward.
For more comprehensive insights and updates, explore the Sofics press release. With companies like Sofics leading the way, the future of semiconductor technology looks promising, indeed.
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