Chip Talk > Pioneering Dual-Algorithm Compression: CAST's Latest IP Core Expansion
Published June 26, 2025
In an exciting development for data processing and semiconductor professionals, CAST has released a unique IP core that supports two of the most esteemed data compression algorithms—LZ4 and Snappy. This innovation presents a significant leap in hardware-based compression technologies, as it deftly combines the strengths of both algorithms to offer robust, flexible, and high-speed data compression solutions. Learn more about CAST's new core here.
In a market where every nanosecond counts, CAST’s stand-alone LZ4SNP-C data compressor is a game-changer. Its autonomous, software-free operation eliminates reliance on the system’s processor, a common bottleneck in data processing systems. This core, along with its decompression counterpart, delivers complete compliance with LZ4 and Snappy standards, promising seamless integration with systems deployed across various platforms.
The IP core is architecturally versatile, adaptable to varying workloads with a configurable number of processing engines. Its design allows synthesis-time configurability, enabling it to manage data throughput from one to several tens of bytes per clock cycle. On FPGA targets running at hundreds of MHz, the core can process over 100 Gbps—an impressive feat that scales up into hundreds of Gbps with moderate silicon resources on ASICs.
A key element of its appeal is the inclusion of an AMBA® AXI4-Stream interface, simplifying integration with streaming systems. Furthermore, the core's scalability is conducive to a diverse array of applications, from high-speed data transmission and data storage systems to enhancing machine learning and AI-driven databases.
Dr. Calliope-Louisa Sotiropoulou, a recognized expert in lossless compression, emphasizes the strategic advantage of the dual-format support. By allowing users to leverage both LZ4 and Snappy algorithms, designers are no longer forced to select one at the cost of potentially losing performance benefits from the other. This flexibility makes the core well-suited to edge computing devices, IoT gateways, and other environments where swift, lossless data transmission is crucial.
More importantly, the product stands out with its straightforward integration and an array of support options that minimize development time and improve project timeline adherence. For semiconductor developers, this means reduced total cost of ownership and faster time-to-market.
The future-oriented design of CAST’s compression core places it ahead of traditional single-algorithm options. As data volumes continue to surge, particularly in realms such as cloud storage, batch data processing, and real-time data analytics, the flexibility and efficiency enabled by dual-algorithm compressors will undoubtedly set the standard.
For those interested in exploring the capabilities of the new core or understanding the nuances of integrating these IPs into existing systems, CAST is offering webinars and demonstrations, deepening industry knowledge and helping users unlock the potential of lossless compression.
In wrapping up, CAST's dual-algorithm compression IP signifies more than just a technological upgrade—it marks a strategic shift towards more robust, flexible, and adaptive solutions in data processing. Its blend of automation, efficiency, and ease of integration underscores the ongoing evolution in semiconductor technology, promising to meet the demands of an ever-expanding data landscape. For more information on how this pioneering technology can enhance your systems, visit CAST's comprehensive product page.
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