Chip Talk > Revolutionizing AI Data Centers: The Cadence-Samsung Partnership
Published June 17, 2025
In the rapidly evolving landscape of semiconductor design, the partnership between Cadence and Samsung Foundry is setting new standards. By integrating Cadence's AI-driven design solutions with Samsung's advanced process node technologies, this collaboration is innovating for AI data centers, automotive, and RF connectivity applications. Let's delve into the impacts and specifics of this ground-breaking agreement.
Cadence's recent multi-year IP agreement with Samsung Foundry signifies a pivotal expansion of their memory and interface IP solutions, targeting the latest technology nodes—SF4X, SF5A, and SF2P (Cadence Announcement). This collaboration presents a robust set of tools designed to enhance productivity and accelerate time to market for SoCs, chiplets, and 3D-ICs. By leveraging advanced process nodes, the partnership is driving innovation across sectors.
The expanded IP portfolio includes elements such as LPDDR6/5x-14.4G, GDDR7-36G, and PCI ExpressⓇ 6.0/5.0/CXL 3.2 technologies, aimed specifically at meeting the demands of AI and high-performance computing (HPC) applications. The introduction of LPDDR5X-8533 PHY IP signifies a stride forward for automotive applications, particularly in advanced driver-assistance systems (ADAS).
Cadence and Samsung's efforts to optimize physical verification flow are crucial for achieving signoff accuracy and runtime goals. Their cooperation includes certifying the Cadence Pegasus™ Verification System for Samsung SF2P and additional nodes, thereby ensuring that mutual customers can expedite their tech developments with precision.
One of the most notable advancements is in the realm of power integrity analysis for 3D-ICs. Cadence tools, such as Voltus™ InsightAI and the Integrity™ 3D-IC Platform, enable comprehensive analysis from early design stages through to final signoff. When applied to a high-speed CPU on Samsung's SF2 node, significant reductions in IR-drop violations were observed—up to 90% resolution—while minimizing performance impacts.
The successful automation of analog cell-based 4nm IP migration to 2nm process nodes showcases the potential for significant development efficiencies. This capability supports a broader trend towards technology scaling and IP reuse, fundamentally reducing time and costs, and setting the groundwork for future innovations across various nodes.
The collaboration between Cadence and Samsung Foundry is more than a strategic partnership; it's a mission to revolutionize the semiconductor industry by delivering cutting-edge solutions for AI, automotive, and connectivity. As they continue to develop co-optimized flows and push the boundaries of design and verification, their joint efforts promise to yield significant advancements for technology leaders worldwide.
For more information about Cadence's innovative solutions, visit the Cadence Press Release.
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