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This DES/3DES core is engineered to provide data encryption according to the NIST standards for DES and triple DES. It handles 64-bit blocks with options for using one, two, or three 56-bit keys and requires only about 3,000 gates, making it an economical choice for secure applications. With fully synchronous design capabilities and available in both source and netlist forms, the core supports various cipher modes including ECB, CBC, and CFB without needing external memory. Its small size and high throughput of 3 Gbps on a 750 MHz technology make it ideal for mobile communication systems and secure financial transactions.
The AES IP core offers an ultracompact implementation of the Rijndael cipher, compliant with the NIST AES encryption standard. Designed to tackle 128-bit data blocks using 128 or 256-bit keys, this core is renowned for its small size of less than 3,000 gates in the base version. It includes key expansion functionality and supports encryption across various modes such as ECB, CBC, OFB, and CTR. With an emphasis on a fully synchronous design, the core facilitates straightforward integration, whether in source or netlist format, for both ASIC and FPGA platforms, offering optional data integrity and power attack resistance features.
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