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Polybus Systems' InfiniBand DDR Link Layer Core is tailored for applications demanding higher data rate capabilities, offering up to 20GBits/second bidirectional throughput. This core operates efficiently at 250 MHz and necessitates the use of a 5 GHz SerDes for optimal performance. Its utility is evident in cutting-edge devices including Xilinx Virtex4FX, Virtex5, and Kintex7 FPGAs, as well as Altera Stratix2GX, making it a staple in advanced hardware that demands robust data handling capabilities. The DDR's efficient configuration is ideal for sophisticated data processing needs that require prompt and seamless transitions of large data volumes.
The InfiniBand QDR Link Layer Core by Polybus Systems represents the pinnacle of high-speed data transfer technology, adeptly supporting operations up to 80Gigabytes per second in ASICs. It operates at dual speeds—500MHz for ASICs and 250MHz for FPGAs, facilitating both 1X and 4X QDR operations or equivalent DDR configurations in FPGAs. The inclusion of a PCS Layer enhances its compatibility with state-of-the-art platforms like Altera Stratix5GX, Xilinx Kintex7, and Virtex7. This core is pivotal for advanced communications infrastructure, ensuring fluid data streams necessary for high-performance computing and data-intensive applications.
Designed by Polybus Systems, the InfiniBand Transport Layer Core offers comprehensive solutions for data acquisition, high-performance computing, and networking environments. It enhances communication by supporting operations such as UC SEND and UC RDMA Write. The core features up to eight virtual lanes and supports 1024 Queue Pairs, making it suitable for systems that require complex data management and robust transport capabilities. Its integration with Polybus' other IPs, especially combined with Link Layer cores, presents an impressive Target Channel Adapter that ensures seamless, low-latency data transfers crucial for modern applications including PCI interfaces, HyperTransport, and Ethernet conversions.
Polybus Systems offers an extensive suite of test patterns specifically crafted for Xilinx FPGAs, aimed at enhancing test coverage and reliability during development. With over 400 customizable patterns at its core, this comprehensive testing solution facilitates thorough in-system diagnostic evaluations. It is particularly useful for identifying failures attributable to handling or internal defects, thereby ensuring the seamless upgradability of FPGA-based systems. This test suite significantly reduces defect rates by offering superior coverage compared to standard manufacturer tests, thereby mitigating risks associated with programmable logic device operations in field-deployable systems.
The InfiniBand SDR Link Layer Core developed by Polybus Systems is engineered for high-efficiency operations, enabling data transfer speeds of up to 10Gbits/second in each direction. Operating at 125 MHz, this versatile core is pivotal in applications involving bidirectional data flow, and is compatible with a variety of hardware configurations such as Xilinx Virtex2P, Virtex4FX, Virtex5, Altera Stratix2GX FPGAs, and even ASICs. Its adaptability to different speed grades ensures optimal performance across diverse technological environments. The core is specifically advantageous for applications requiring reliable data throughput and is actively leveraged in various high-demand system architectures.
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